Abstract: Various embodiments of the present technology may provide methods and apparatus for a voice detector. The voice detector may provide a microphone and an audio processor. The microphone may provide an active signal generator configured to generate an active signal. The active signal may indicate when the signal level of detected audio is above or below a threshold level with a first state and a second state. The active signal may prevent activity at the microphone I/O interface and may prevent activity at the audio processor's internal logic.

Abstract: Various embodiments of the present technology may provide methods and apparatus for a voice detector. The voice detector may provide a microphone and an audio processor. The microphone may provide an active signal generator configured to generate an active signal. The active signal may indicate when the signal level of detected audio is above or below a threshold level with a first state and a second state. The active signal may prevent activity at the microphone I/O interface and may prevent activity at the audio processor's internal logic.

Abstract: Various embodiments of the present technology may comprise a method and apparatus for power management of a memory cell. The memory cell may be configured to operate at various voltage levels to mitigate power dissipation. The memory cell may receive a first voltage level during an active state and receive a second voltage level during an idle state. The active and idle states may be known based on predetermined system parameters. The second voltage level may be selected according to the particular characteristics of the memory cell in order to retain input data.

Abstract: Various embodiments of the present technology may comprise a method and apparatus for power management of a memory cell. The memory cell may be configured to operate at various voltage levels to mitigate power dissipation. The memory cell may receive a first voltage level during an active state and receive a second voltage level during an idle state. The active and idle states may be known based on predetermined system parameters. The second voltage level may be selected according to the particular characteristics of the memory cell in order to retain input data.

Abstract: Various embodiments of the present technology may comprise a method and apparatus for power management of a memory cell. The memory cell may be configured to operate at various voltage levels to mitigate power dissipation. The memory cell may receive a first voltage level during an active state and receive a second voltage level during an idle state. The active and idle states may be known based on predetermined system parameters. The second voltage level may be selected according to the particular characteristics of the memory cell in order to retain input data.

Abstract: Various embodiments of the present technology may comprise a method and apparatus for power management of a memory cell. The memory cell may be configured to operate at various voltage levels to mitigate power dissipation. The memory cell may receive a first voltage level during an active state and receive a second voltage level during an idle state. The active and idle states may be known based on predetermined system parameters. The second voltage level may be selected according to the particular characteristics of the memory cell in order to retain input data.

Abstract: An integrated circuit comprising a source voltage monitoring unit that monitors the level of a first source voltage supplied from an external power source, determines whether the first source voltage is supplied from the external power source, and controls an internal power source and the external power source; so as to apply the first source voltage, when determining that the first source voltage is supplied; and so as to apply a second source voltage supplied from the internal power source, whose level is lower than that of the first source voltage, when determining that the first source voltage is not supplied, wherein the integrated circuit operates with application of either one of the first source voltage and the second source voltage.

Abstract: An integrated circuit that operates with application of an external power source supplying a first source voltage, the circuit comprising: a source voltage monitoring unit that monitors the level of the first source voltage supplied from the external power source, and that determines whether the first source voltage is supplied from the external power source; a clock selecting unit that is supplied with a first clock of a first frequency and a second clock of a second frequency lower than the first frequency, and that selects and outputs the first clock when it is determined by the source voltage monitoring unit that the first source voltage is supplied and the second clock when it is determined by the source voltage monitoring unit that the first source voltage is not supplied; and a processor that operates with supply of either one of the first clock and the second clock output by the clock selecting unit and controls the operation of the integrated circuit.

Abstract: A sound data processing apparatus includes a decoder for performing decoding processing of sound data, an interface unit connected to an external memory, a data transfer control unit for reading the sound data from the external memory mounted on the interface unit to transfer the read sound data to the decoder, and a central processing unit for controlling the processing of the decoder, the interface unit, and the data transfer control unit. The power consumption of electronic equipment including the sound data processing apparatus is thereby decreased.

Abstract: An integrated circuit that operates with application of an external power source supplying a first source voltage, the circuit comprising: a source voltage monitoring unit that monitors the level of the first source voltage supplied from the external power source, and that determines whether the first source voltage is supplied from the external power source; a clock selecting unit that is supplied with a first clock of a first frequency and a second clock of a second frequency lower than the first frequency, and that selects and outputs the first clock when it is determined by the source voltage monitoring unit that the first source voltage is supplied and the second clock when it is determined by the source voltage monitoring unit that the first source voltage is not supplied; and a processor that operates with supply of either one of the first clock and the second clock output by the clock selecting unit and controls the operation of the integrated circuit.

Abstract: An integrated circuit comprising a source voltage monitoring unit that monitors the level of a first source voltage supplied from an external power source, determines whether the first source voltage is supplied from the external power source, and controls an internal power source and the external power source; so as to apply the first source voltage, when determining that the first source voltage is supplied; and so as to apply a second source voltage supplied from the internal power source, whose level is lower than that of the first source voltage, when determining that the first source voltage is not supplied, wherein the integrated circuit operates with application of either one of the first source voltage and the second source voltage.