Patents by Inventor Kenichi Masumoto
Kenichi Masumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180376627Abstract: A display apparatus is provided that includes a display panel, a plate-shaped base disposed on a rear surface side of the display panel, and a flexible wiring substrate. The display apparatus also includes a circuit substrate, an electronic component attached to at least one of the wiring substrate and the circuit substrate, and a heat conductive member attached to a rear surface of the electronic component. The display apparatus further includes a rear structural member disposed to cover the heat conductive member, and a connecting member that connects the base and the rear structural member and generates a compressive force that compresses the heat conductive member being sandwiched by the electronic component and the rear structural member.Type: ApplicationFiled: August 30, 2018Publication date: December 27, 2018Applicant: JOLED INC.Inventor: Kenichi MASUMOTO
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Patent number: 10104815Abstract: An organic EL display apparatus includes: a display panel; a plate-shaped base disposed on a rear surface side of the display panel; a flexible wiring substrate; a circuit substrate; an electronic component attached to at least one of the wiring substrate and the circuit substrate; a heat conductive member attached to a rear surface of the electronic component; a rear structural member disposed to cover the heat conductive member; and a connecting member that connects the base and the rear structural member and generates a compressive force that compresses the heat conductive member being sandwiched by the electronic component and the rear structural member.Type: GrantFiled: May 29, 2015Date of Patent: October 16, 2018Assignee: JOLED INC.Inventor: Kenichi Masumoto
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Patent number: 9812058Abstract: The application discloses a method for manufacturing a luminescent panel including a luminescent area provided with emission pixels arranged in row and column directions. The manufacturing method includes a first step of dividing the luminescent area into segment areas so that each of the segment areas includes at least one of the emission pixels; a second step of selecting a part of the segment areas as a first area, and the segment areas adjacent to the first area in the row and column directions as second areas; and a third step of aging the emission pixel in the first area by energization to generate an aging area.Type: GrantFiled: April 17, 2013Date of Patent: November 7, 2017Assignee: JOLED INC.Inventors: Kenichi Masumoto, Hiroyuki Yamakita, Hiroki Yamamoto
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Patent number: 9801253Abstract: A method for manufacturing an emission panel which has an emission portion including pixels, through which currents of mutually different values flow under a condition that voltages of mutually identical values are applied to the respective pixels is disclosed. This manufacturing method includes: an acquisition step of acquiring correction coefficients for correcting the values of the voltages applied to the respective pixels to reduce differences among the values in current flowing through the respective pixels; and an aging step of executing aging processing on the pixels, the aging processing being executed by correcting the values of the voltages applied to the respective pixels using the correction coefficients and by applying the corrected voltages to the respective pixels.Type: GrantFiled: November 2, 2012Date of Patent: October 24, 2017Assignee: JOLED INC.Inventors: Hiroki Yamamoto, Hiroyuki Yamakita, Kenichi Masumoto
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Publication number: 20170162820Abstract: An organic EL display apparatus includes: a display panel; a plate-shaped base disposed on a rear surface side of the display panel; a flexible wiring substrate; a circuit substrate; an electronic component attached to at least one of the wiring substrate and the circuit substrate; a heat conductive member attached to a rear surface of the electronic component; a rear structural member disposed to cover the heat conductive member; and a connecting member that connects the base and the rear structural member and generates a compressive force that compresses the heat conductive member being sandwiched by the electronic component and the rear structural member.Type: ApplicationFiled: May 29, 2015Publication date: June 8, 2017Applicant: JOLED INC.Inventor: Kenichi MASUMOTO
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Patent number: 9129920Abstract: The present application discloses a display panel including flexible substrates on which first power lines are mounted to supply power; a substrate including a first surface provided with a display area, a second surface opposite to the first surface, and second power lines for connecting the first power lines to the display pixels; a thermal conduction member partially covering the second surface and conducting heat in an in-plane direction; and a thermal conduction seal covering a periphery of the thermal conduction member. The first surface includes an arrangement area to arrange the second power lines between the flexible substrates and the display area. The second surface includes a first area opposite to the display area and a second area opposite to the arrangement area. The thermal conduction member covers at least the first area. The thermal conduction seal covers the second area.Type: GrantFiled: July 22, 2011Date of Patent: September 8, 2015Assignee: JOLED INC.Inventors: Kenichi Masumoto, Hiroyuki Yamakita
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Patent number: 9117406Abstract: A display apparatus is provided which optimally restores decreased luminance and extends a life of a light emitting element. The display apparatus includes a memory that stores a plurality of trap levels in association with a plurality of use durations of the light emitting element. An obtainer determines one of the plurality of use durations of the light emitting element. A controller reads, from the memory, one of the plurality of trap levels associated with the one of the plurality of use durations, and removes a charge from the light emitting element by application of a reverse bias voltage having a level associated with the one of the plurality of trap levels. The controller changes the level of the reverse bias voltage which is applied to the light emitting element so that as the one of the plurality of use durations increases, the level of the reverse bias voltage increases.Type: GrantFiled: May 23, 2014Date of Patent: August 25, 2015Assignee: JOLED INC.Inventors: Tetsurou Nakamura, Kenichi Masumoto
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Patent number: 8975624Abstract: The present application discloses OEL display panel including OEL board including organic emission elements situated in respective emission regions compartmentalized by confining wall, and black matrix facing OEL board. The black matrix is provided with openings, each of which allows passage of light from each of the organic emission elements. Organic emission elements include first organic emission element with organic emission layer for emitting light in first emission color, and second organic emission element with organic emission layer for emitting light in second emission color different from first emission color. Openings include first opening corresponding to first organic emission element, and second opening corresponding to second organic emission element. First organic emission element has lower emission efficiency than second organic emission element does. Thermal conductivity is higher around first opening than second opening.Type: GrantFiled: July 19, 2011Date of Patent: March 10, 2015Assignee: Panasonic CorporationInventors: Hiroyuki Yamakita, Kenichi Masumoto
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Publication number: 20150049127Abstract: The application discloses a method for manufacturing a luminescent panel including a luminescent area provided with emission pixels arranged in row and column directions. The manufacturing method includes a first step of dividing the luminescent area into segment areas so that each of the segment areas includes at least one of the emission pixels; a second step of selecting a part of the segment areas as a first area, and the segment areas adjacent to the first area in the row and column directions as second areas; and a third step of aging the emission pixel in the first area by energization to generate an aging area.Type: ApplicationFiled: April 17, 2013Publication date: February 19, 2015Applicant: PANASONIC CORPORATIONInventors: Kenichi Masumoto, Hiroyuki Yamakita, Hiroki Yamamoto
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Publication number: 20140320042Abstract: A method for manufacturing an emission panel which has an emission portion including pixels, through which currents of mutually different values flow under a condition that voltages of mutually identical values are applied to the respective pixels is disclosed. This manufacturing method includes: an acquisition step of acquiring correction coefficients for correcting the values of the voltages applied to the respective pixels to reduce differences among the values in current flowing through the respective pixels; and an aging step of executing aging processing on the pixels, the aging processing being executed by correcting the values of the voltages applied to the respective pixels using the correction coefficients and by applying the corrected voltages to the respective pixels.Type: ApplicationFiled: November 2, 2012Publication date: October 30, 2014Inventors: Hiroki Yamamoto, Hiroyuki Yamakita, Kenichi Masumoto
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Publication number: 20140252957Abstract: A display apparatus is provided which optimally restores decreased luminance and extends a life of a light emitting element. The display apparatus includes a memory that stores a plurality of trap levels in association with a plurality of use durations of the light emitting element. An obtainer determines one of the plurality of use durations of the light emitting element. A controller reads, from the memory, one of the plurality of trap levels associated with the one of the plurality of use durations, and removes a charge from the light emitting element by application of a reverse bias voltage having a level associated with the one of the plurality of trap levels. The controller changes the level of the reverse bias voltage which is applied to the light emitting element so that as the one of the plurality of use durations increases, the level of the reverse bias voltage increases.Type: ApplicationFiled: May 23, 2014Publication date: September 11, 2014Applicant: PANASONIC CORPORATIONInventors: Tetsurou NAKAMURA, Kenichi MASUMOTO
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Publication number: 20140131693Abstract: The present application discloses a display panel including flexible substrates on which first power lines are mounted to supply power; a substrate including a first surface provided with a display area, a second surface opposite to the first surface, and second power lines for connecting the first power lines to the display pixels; a thermal conduction member partially covering the second surface and conducting heat in an in-plane direction; and a thermal conduction seal covering a periphery of the thermal conduction member. The first surface includes an arrangement area to arrange the second power lines between the flexible substrates and the display area. The second surface includes a first area opposite to the display area and a second area opposite to the arrangement area. The thermal conduction member covers at least the first area. The thermal conduction seal covers the second area.Type: ApplicationFiled: July 22, 2011Publication date: May 15, 2014Applicant: PANASONIC CORPORATIONInventors: Kenichi Masumoto, Hiroyuki Yamakita
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Publication number: 20140042424Abstract: The present application discloses OEL display panel including OEL board including organic emission elements situated in respective emission regions compartmentalized by confining wall, and black matrix facing OEL board. The black matrix is provided with openings, each of which allows passage of light from each of the organic emission elements. Organic emission elements include first organic emission element with organic emission layer for emitting light in first emission color, and second organic emission element with organic emission layer for emitting light in second emission color different from first emission color. Openings include first opening corresponding to first organic emission element, and second opening corresponding to second organic emission element. First organic emission element has lower emission efficiency than second organic emission element does. Thermal conductivity is higher around first opening than second opening.Type: ApplicationFiled: July 19, 2011Publication date: February 13, 2014Applicant: PANASONIC CORPORATIONInventors: Hiroyuki Yamakita, Kenichi Masumoto
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Patent number: 8552940Abstract: A display device includes luminescence pixels that each include a driving transistor, a luminescence element, and a switching transistor that switches between conduction and non-conduction between a data line and an anode or a cathode of the luminescence element. A data driving circuit supplies a signal voltage to the data line, and a bias supplying circuit supplies a predetermined bias voltage to the data line. A controller applies the predetermined bias voltage to the anode or the cathode of the luminescence element by causing a non-conduction state between the data line and the data driving circuit, causing a conduction state between the data line and the bias supplying circuit, and switching the switching transistor ON within a period in which a signal current does not flow to the luminescence element.Type: GrantFiled: June 14, 2012Date of Patent: October 8, 2013Assignee: Panasonic CorporationInventors: Mika Nakamura, Kenichi Masumoto
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Patent number: 8456389Abstract: A display device includes a luminescence element. A power line provides the luminescence element with an electric current. A capacitor accumulates a driving voltage corresponding to a data voltage. A driver flows the electric current according to the driving voltage accumulated in the capacitor through the luminescence element via the power line. A controller is configured to set a reverse bias voltage and an application time period according to an amount of luminescence produced by the luminescence element, and to determine luminance levels in luminescence periods. The controller sets the reverse bias voltage and the application time period according to a peak luminance of the luminance levels when a difference between the peak luminance and an average luminance of the luminance levels exceeds a predetermined threshold, and applies the reverse bias voltage for the application time period within an OFF period of the data voltage for removing an electric charge accumulated in the luminescence element.Type: GrantFiled: April 19, 2010Date of Patent: June 4, 2013Assignee: Panasonic CorporationInventors: Kenichi Masumoto, Tetsurou Nakamura
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Publication number: 20120249612Abstract: A display device includes luminescence pixels that each include a driving transistor, a luminescence element, and a switching transistor that switches between conduction and non-conduction between a data line and an anode or a cathode of the luminescence element. A data driving circuit supplies a signal voltage to the data line, and a bias supplying circuit supplies a predetermined bias voltage to the data line. A controller applies the predetermined bias voltage to the anode or the cathode of the luminescence element by causing a non-conduction state between the data line and the data driving circuit, causing a conduction state between the data line and the bias supplying circuit, and switching the switching transistor ON within a period in which a signal current does not flow to the luminescence element.Type: ApplicationFiled: June 14, 2012Publication date: October 4, 2012Applicant: PANASONIC CORPORATIONInventors: Mika NAKAMURA, Kenichi MASUMOTO
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Patent number: 8223094Abstract: Display devices and methods capable of reversing brightness deterioration in electroluminescence elements while maintaining display quality, with simple pixel circuits and no manufacturing yield reduction, are provided. A display device includes luminescence pixels that each include a driving transistor, a luminescence element, and a switching transistor which switches between conduction and non-conduction states between a data line and the luminescence element. A data driving circuit supplies a signal voltage to the data line and a bias supplying circuit supplies a specified bias voltage to the data line. A control unit applies the specified bias voltage to an anode or cathode of the luminescence element by causing conduction between the data line and the data driving circuit, causing non-conduction between the data line and the bias supplying circuit, and turning the switching transistor ON, all within a period in which a signal current does not flow to the luminescence element.Type: GrantFiled: February 26, 2010Date of Patent: July 17, 2012Assignee: Panasonic CorporationInventors: Mika Nakamura, Kenichi Masumoto
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Publication number: 20100201722Abstract: A display device includes a luminescence element. A power line provides the luminescence element with an electric current. A capacitor accumulates a driving voltage corresponding to a data voltage. A driver flows the electric current according to the driving voltage accumulated in the capacitor through the luminescence element via the power line. A controller is configured to set a reverse bias voltage and an application time period according to an amount of luminescence produced by the luminescence element, and to determine luminance levels in luminescence periods. The controller sets the reverse bias voltage and the application time period according to a peak luminance of the luminance levels when a difference between the peak luminance and an average luminance of the luminance levels exceeds a predetermined threshold, and applies the reverse bias voltage for the application time period within an OFF period of the data voltage for removing an electric charge accumulated in the luminescence element.Type: ApplicationFiled: April 19, 2010Publication date: August 12, 2010Applicant: PANASONIC CORPORATIONInventors: Kenichi MASUMOTO, Tetsurou NAKAMURA
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Publication number: 20100182352Abstract: A display apparatus is provided which optimally restores decreased luminance and extends a life of a light emitting element. The display apparatus includes a memory that stores a plurality of trap levels in association with a plurality of use durations of the light emitting element. An obtainer determines one of the plurality of use durations of the light emitting element. A controller reads, from the memory, one of the plurality of trap levels associated with the one of the plurality of use durations, and removes a charge from the light emitting element by application of a reverse bias voltage having a level associated with the one of the plurality of trap levels. The controller changes the level of the reverse bias voltage which is applied to the light emitting element so that as the one of the plurality of use durations increases, the level of the reverse bias voltage increases.Type: ApplicationFiled: March 29, 2010Publication date: July 22, 2010Applicant: PANASONIC CORPORATIONInventors: Tetsurou NAKAMURA, Kenichi MASUMOTO
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Publication number: 20100149140Abstract: Display devices and methods capable of reversing brightness deterioration in electroluminescence elements while maintaining display quality, with simple pixel circuits and no manufacturing yield reduction, are provided. A display device includes luminescence pixels that each include a driving transistor, a luminescence element, and a switching transistor which switches between conduction and non-conduction states between a data line and the luminescence element. A data driving circuit supplies a signal voltage to the data line and a bias supplying circuit supplies a specified bias voltage to the data line. A control unit applies the specified bias voltage to an anode or cathode of the luminescence element by causing conduction between the data line and the data driving circuit, causing non-conduction between the data line and the bias supplying circuit, and turning the switching transistor ON, all within a period in which a signal current does not flow to the luminescence element.Type: ApplicationFiled: February 26, 2010Publication date: June 17, 2010Applicant: PANASONIC CORPORATIONInventors: Mika NAKAMURA, Kenichi MASUMOTO