Patents by Inventor Kenichi Matsuda
Kenichi Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5784188Abstract: An electro-absorption optical modulator, where a waveguide length of the absorption layer is denoted by L, a light confinement coefficient thereof is denoted by .GAMMA., and a performance factor of the absorption layer at an applied voltage V to an absorption layer is denoted by K(V), has design parameters selected so that a relationship .vertline.K(V)-.GAMMA..multidot.L.vertline. .ltoreq.0.005 cm is satisfied in a continuous operation range of a quenching ration T.sub.Att. The waveguide length L is preferably optimizrd so as to satisfy K(V).apprxeq..GAMMA..multidot.L in the operation range.Type: GrantFiled: February 7, 1997Date of Patent: July 21, 1998Assignee: Matsushita Electric Industrial Co., Inc.Inventors: Shinji Nakamura, Satoshi Kamiyama, Kenichi Matsuda, Yasushi Matsui
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Patent number: 5774616Abstract: A semiconductor laser module includes: a semiconductor substrate; a plurality of surface emitting lasers provided on a primary plane of the semiconductor substrate; a plurality of guiding holes provided on a secondary plane of the semiconductor substrate, the secondary plane being opposite to the primary plane; and an optical fiber tape including a plurality of optical fibers and a covering material which fixes the plurality of optical fibers in parallel with each other, one tip of the optical fiber tape being adjoined to the secondary plane of the semiconductor substrate. A pitch of the respective surface emitting lasers is equal to an interval of a center of the respective optical fibers. The respective guiding holes are aligned with the respective surface emitting lasers so that a center of a light beam emitted from each of the surface emitting lasers and a center of each of the guiding holes are at approximately the same position on the secondary plane of the semiconductor substrate.Type: GrantFiled: June 25, 1996Date of Patent: June 30, 1998Assignee: Matsushita Electrical Industrial Co., Ltd.Inventor: Kenichi Matsuda
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Patent number: 5742720Abstract: Mutually parallel V grooves are formed on the upper surface of a first support member of an optical fiber array ferrule, and then an optical fiber wire is disposed in each of the V grooves. Stacked thereon is a second support member having V grooves formed on both the upper and lower surfaces thereof so as to oppose each other, the V grooves on the lower surface serving as guiding grooves. An optical fiber wire is also disposed in each of the V grooves on the upper surface of the second support member. Further stacked thereon is a third support member having V grooves formed on the lower surface thereof, so that an optical fiber array ferrule is configured. The optical fiber array ferrule as well as a surface emitting laser array are mounted on a single substrate so that an optical coupling module is configured.Type: GrantFiled: August 29, 1996Date of Patent: April 21, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Kobayashi, Kenichi Matsuda
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Patent number: 5679964Abstract: The optoelectronic integrated device includes a semiconductor substrate, a vertical-cavity surface-emitting semiconductor laser formed on the semiconductor substrate, a phototransistor stacked over the vertical-cavity surface emitting semiconductor laser, for driving the vertical-cavity surface-emitting semiconductor laser, and a semiconductor buffer structure interposed between the vertical-cavity surface-emitting semiconductor laser and the phototransistor. The vertical-cavity surface-emitting semiconductor laser includes: a bottom semiconductor mirror; a top semiconductor mirror; and an active region interposed between the bottom semiconductor mirror and the top semiconductor mirror and having a strained quantum well structure for emitting light having a wavelength of .lambda.. The phototransistor includes: a collector layer; an emitter layer; and a base layer interposed between the collector layer and the emitter layer and absorbing light having a wavelength of .lambda..Type: GrantFiled: July 5, 1995Date of Patent: October 21, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Kobayashi, Kenichi Matsuda
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Patent number: 5677590Abstract: An electron gun which has an assembly precision improved by the reduction of deformation of an electrode during assembly as well as good focusing performance due to the elimination of positional deviation of electron beams. The electron gun comprises a composite electrode including at least two electrode elements united together and a plurality of electrodes sequentially arrayed along a single axis at predetermined intervals. In the electron gun, opposed faces of the electrode elements of the composite electrode are perpendicular to the axis and the opposed faces are provided with projections which serve to constitute the composite electrode when the projections are united together in opposed relationship to each other.Type: GrantFiled: September 4, 1996Date of Patent: October 14, 1997Assignees: Hitachi, Ltd., Hitachi Electronic Devices Co., Ltd.Inventors: Kenichi Matsuda, Takeshi Mera, Satoru Endo
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Patent number: 5574330Abstract: There is provided an electron gun which has an assembly precision improved by the reduction of deformation of an electrode during assembly as well as good focusing performance due to the elimination of positional deviation of electron beams. There is also provided a method of assembling such an electron gun. The electron gun comprises a composite electrode including at least two electrode elements united together and a plurality of electrodes sequentially arrayed along a single axis at predetermined intervals. In the electron gun, opposed faces of the electrode elements of the composite electrode are perpendicular to the axis and the opposed faces are provided with projections 1a and 1b which serve to constitute the composite electrode when the projections are united together in opposed relationship to each other.Type: GrantFiled: March 6, 1995Date of Patent: November 12, 1996Assignee: Hitachi, Ltd.Inventors: Kenichi Matsuda, Takeshi Mera, Satoru Endo
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Patent number: 5513202Abstract: A vertical-cavity surface-emitting semiconductor laser includes: a p-type bottom mirror having an upper face; a p-type spacer layer covering over the entire upper face of the p-type bottom mirror; an active region including an active layer having a bottom face smaller than the upper face of the p-type bottom mirror, the active region being formed on the p-type spacer layer; an n-type spacer layer formed on the active region; and an n-type top mirror formed on the n-type spacer layer, wherein a sum d of optical path lengths of the p-type spacer layer, the active region and the n-type spacer layer in a perpendicular direction satisfies a relationship expressed by d=(1+n).cndot..lambda./2 (n: natural number) with respect to a wavelength .lambda. of light oscillated from the active region.Type: GrantFiled: February 23, 1995Date of Patent: April 30, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Kobayashi, Toyoji Chino, Kenichi Matsuda
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Patent number: 5434939Abstract: An optical fiber module comprises a light-emitting chip based on a semiconductor substrate, a vertical cavity surface emitting laser formed on a primary plane of the light-emitting chip, a guiding hole opened on a secondary plane of the light-emitting chip, and an optical fiber stuck to the secondary plane of the light-emitting chip. The position of the guiding hole is aligned to that of the surface emitting laser, and the guiding hole is close to the surface emitting laser. By inserting a tip of the optical fiber into the guiding hole, the optical fiber is coupled optically to the surface emitting laser only with mechanical positioning. The light-emitting chip is mounted on an electronic circuit board with the primary plane attached to it.Type: GrantFiled: February 8, 1994Date of Patent: July 18, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Kenichi Matsuda
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Patent number: 5416044Abstract: A method for producing a surface-emitting laser, includes the steps of: forming a mask pattern to define a top mirror on a semiconductor substrate, the semiconductor substrate having a first semiconductor multilayer formed on the semiconductor substrate, a second semiconductor multilayer formed on the first semiconductor multilayer, and a third semiconductor multilayer formed on the second semiconductor multilayer, the first semiconductor multilayer constituting a bottom mirror, the second semiconductor layer including an upper barrier layer and a lower barrier layer, and an active layer sandwiched between the upper and lower barrier layers, the third semiconductor multilayer constituting a top mirror; forming the top mirror by partially removing the third semiconductor layer by dry etching using the mask pattern as a mask until the surface of the upper barrier layer of the second semiconductor multilayer is exposed; forming an etching protective film at least on the side of the top mirror; partially removingType: GrantFiled: March 11, 1994Date of Patent: May 16, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toyoji Chino, Kenichi Matsuda
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Patent number: 5408105Abstract: There are disclosed a low driving voltage surface emitting semiconductor laser and an optoelectronic integrated which comprises a two-dimensional array of such surface emitting semiconductor lasers which are modulatable with input signals of small voltage amplitudes. In an embodiment of the present invention, an optical semiconductor device includes a GaAs substrate 105, and an epitaxial growth layer structure on the GaAs substrate, the epitaxial growth layer structure including in the named order a p type GaAs/AlAs multilayer semiconductor mirror layer 104, an active layer 103 and an n type GaAs/AlAs multilayer semiconductor mirror layer 102. The epitaxial growth layer structure is etched to the depth of the active layer in forming a mesa, while the p type mirror layer remains unetched throughout a top surface of the semiconductor substrate.Type: GrantFiled: February 18, 1993Date of Patent: April 18, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideo Adachi, Kenichi Matsuda
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Patent number: 5393994Abstract: An optical semiconductor device is disclosed which includes a semiconductor laser having at least an active layer, reflecting means formed on the semiconductor laser for reflecting internal feedback light generated from the semiconductor laser and at least two phototransistors formed on the reflecting means for detecting light having a wavelength substantially identical to that of laser light oscillated from the active layer.Type: GrantFiled: February 7, 1994Date of Patent: February 28, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Kobayashi, Kenichi Matsuda
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Patent number: 5321294Abstract: A shift register according to the present invention includes: a plurality of first electrodes; at least one second electrode; a voltage application unit for applying a voltage to each of the plurality of first electrodes; a plurality of optically bistable elements connected to each of the plurality of first electrodes and at least one second electrode; and an optical waveguide layer for optically coupling the plurality of optically bistable elements to each other.Type: GrantFiled: June 24, 1993Date of Patent: June 14, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toyoji Chino, Kenichi Matsuda
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Patent number: 5315105Abstract: An optical operational memory device comprises a light-emitting device, a first and second phototransistors, and a load resistor. The light-emitting device and the first phototransistor are connected electrically in series to form an optical bistable switch based on optical positive feedback. The second phototransistor is connected in parallel to the optical bistable switch, and the load resistor is connected in series to the optical bistable switch. The time constant given by the product of the current gain of the second phototransistor, the base-collector capacitance of the second phototransistor, and the resistance of the load resistor is larger than the period required for recombination of the excess majority carriers in the base of the first phototransistor. A single optical beam modulated with pulse signals is input to the first and the second phototransistors simultaneously.Type: GrantFiled: July 29, 1993Date of Patent: May 24, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenichi Matsuda, Jun Shibata
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Patent number: 5308440Abstract: A semiconductor device with air-bridge interconnection comprises: a substrate; a plurality of mesas with distance therebetween smaller than a predetermined value; and a metal layer supported by the plurality of mesas, the metal layer having a narrow portion at the intermediate portion thereof and both ends having larger width than the narrow portion. The air-bridge interconnection is obtained by side-etching controlled during dry-etching using interconnection metal layer as an etching-mask to remove a mass of semiconductor material under the interconnection metal layer.Type: GrantFiled: September 2, 1992Date of Patent: May 3, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toyoji Chino, Kenichi Matsuda, Jun Shibata
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Patent number: 5233556Abstract: An optoelectronic memory and logic device has a function of a reset-set flip-flop (RS-FF) or an exclusive-OR (EOR) gate. The RS-FF includes a first and a second optical inverter circuits. The optical inverter circuit includes a parallel connection of a light emitting device and a phototransistor, and a load resistor connected in series. The phototransistor in the first (second) optical inverter circuit receives the light from the lihgt emitting device in the second (first) optical inverter circuit. The RS-FF has high contrast ratio in case of emitting high output power, and operates stably when the load resistance and the bias voltage are fluctuated. The EOR gate comprises a parallel connection of an adder circuit and a multiplier circuit, and a load resistor connected in series. The adder circuit is a series connection of a light emitting device and a first phototransistor. The multiplier circuit is a series connection of a second phototransistor and a third phototransistor.Type: GrantFiled: January 28, 1992Date of Patent: August 3, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenichi Matsuda, Jun Shibata
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Patent number: 5147827Abstract: A device such as a phototransistor, a photodiode, a laser diode or the like including a compound semiconductor coated with a stable passivation film to reduce leakage current is disclosed. The passivation film includes oxygen, a metallic element and constituent elements of the device, and the concentration of the elements included in the passivation film changes gradually through the interface between the passivation film and the device. Such a passivation film is formed by the oxidation or anodic oxidation of a device soaked in an aqueous solution of hydrogen oxide containing metallic ions such as Fe.sup.2+, Fe.sup.3+, Cu.sup.+, Cu.sup.2+, Co.sup.2+ or Cr.sup.2+ under the control of the temperature of the solution.Type: GrantFiled: June 6, 1991Date of Patent: September 15, 1992Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toyoji Chino, Kenichi Matsuda, Shibata Jun
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Patent number: 5095200Abstract: An optoelectronic memory, logic, and interconnection device having an optical bistable circuit as an essential element. The optical bistable circuit includes an optical bistable switch which is a light emitting device and a first phototransistor detecting the light emitted from the light emitting device, connected in series, a second phototransistor connected in parallel to the optical bistable switch which does not detect the light emitted from the light emitting device, and a load resistor connected in series to the optical bistable switch. The optoelectronic memory, logic, and interconnection device operates as an optoelectronic memory device turned on and off with the same light source, as an optoelectronic logic device executing exclusive OR operation, or as a light source for reconfigurable optical interconnection.Type: GrantFiled: January 11, 1991Date of Patent: March 10, 1992Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenichi Matsuda, Jun Shibata
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Patent number: 5014096Abstract: An optoelectronic integrated circuit including an optical bistable circuit comprises: an optical gate device responsive to a current injected to an active layer thereof and to a first ray transmitted through the active layer for emitting first and second light rays and for controlling intensity of the first light ray in accordance with the current; and a first phototransistor serially connected with the optical gate device so arranged to receive the second light ray for causing the current to flow through the optical gate device in response to the second light ray and a set signal light ray, the first phototransistor holding flowing of the current when the second light ray is emitted. This circuit can control the first light ray incident to the optical gate device in response to a set signal light ray applied to the first phototransistor. A second phototransistor may be included for stopping emission of light by the optical gate device in response to a reset signal light ray.Type: GrantFiled: February 1, 1990Date of Patent: May 7, 1991Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenichi Matsuda, Jun Shibata
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Patent number: 4899360Abstract: A semiconductor laser device of a new monolithic structure has a long transparent optical waveguide used as a passive cavity directly coupled with an active cavity possessing a gain in the direction of the optical axis of the active cavity on a compound semiconductor substrate. The device is intended to satisfy all of four characteristics, which are;(1) stable single longitudinal mode oscillation;(2) narrow spectral linewidth;(3) suppression of wavelength chirping due to current modulation; and(4) low noiseand to be applied as a light source for optical fiber communication, optical information processing or the like.Type: GrantFiled: November 8, 1988Date of Patent: February 6, 1990Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshihiro Fujita, Jun Ohya, Kenichi Matsuda, Hiroyuki Serizawa
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Patent number: D310615Type: GrantFiled: February 16, 1988Date of Patent: September 18, 1990Assignee: Sharp CorporationInventors: Isao Kitai, Kenichi Matsuda, Mikio Ogasawara