Patents by Inventor Kenichi MINEDA
Kenichi MINEDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10540156Abstract: A computer generates a parallel program, based on an analysis of a single program that includes a plurality of tasks written for a single-core microcomputer, by parallelizing parallelizable tasks for a multi-core processor having multiple cores. The computer includes a macro task (MT) group extractor that analyzes, or finds, a commonly-accessed resource commonly accessed by the plurality of tasks, and extracts a plurality of MTs showing access to such commonly-accessed resource. Then, the computer uses an allocation restriction determiner to allocate the extracted plural MTs to the same core in the multi-core processor. By devising a parallelization method described above, an overhead in an execution time of the parallel program by the multi-core processor is reduced, and an in-vehicle device is enabled to execute each of the MTs in the program optimally.Type: GrantFiled: June 8, 2017Date of Patent: January 21, 2020Assignee: DENSO CORPORATIONInventor: Kenichi Mineda
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Patent number: 10379828Abstract: A computer is configured to generate a parallel program for a multi-core microcomputer from a single program for a single-core microcomputer, based on a dependency analysis of a bundle of unit processes in the single program. The computer obtains dependency information that enables dependency determination of dependency un-analyzable unit processes. Further, the computer performs a dependency analysis of dependency analyzable unit processes. Then, the computer assigns the dependency un-analyzable unit processes and the dependency analyzable unit processes respectively to multiple cores of the multi-core microcomputer, while fulfilling dependency among those processes, based on the obtained dependency information of the dependency un-analyzable unit processes and an analysis result of the dependency analyzable unit processes.Type: GrantFiled: June 9, 2017Date of Patent: August 13, 2019Assignee: DENSO CORPORATIONInventors: Kenichi Mineda, Takayuki Nagai, Yu Nakagawa
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Patent number: 10296316Abstract: A method is for generating a parallel program for a multicore microcomputer from processes in a single program for a single core. The method includes extraction procedure, association procedure, and analysis procedure. The extraction procedure extracts (i) an extracted address of an accessed data item, which is among data items stored in a storage area together with the processes and accessed when each process is executed and (ii) an extracted symbol name of the accessed data item. The association procedure associates an associated address in the storage area storing the accessed data item of the extracted symbol name with the extracted symbol name. The analysis procedure analyzes a dependency between each process based on the extracted address and the associated address, and determines that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency.Type: GrantFiled: November 14, 2016Date of Patent: May 21, 2019Assignee: DENSO CORPORATIONInventor: Kenichi Mineda
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Patent number: 10255119Abstract: A parallelization method for generating a parallel program for a multicore microcomputer from multiple processes in a single program for a single-core microcomputer is provided. In the single program, there are multiple types of the processes and a combination of the types of processes to be executed varies according to condition. The parallelization method includes extracting processing patterns respectively representing the combinations of types in the conditions from the single program and allocating the processes to the cores for each of the extracted processing patterns to generate the parallel program.Type: GrantFiled: September 29, 2016Date of Patent: April 9, 2019Assignee: DENSO CORPORATIONInventor: Kenichi Mineda
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Patent number: 10228923Abstract: A parallelization compiling method for generating a segmented program from a sequential program, in which multiple macro tasks are included and at least two of the macro tasks have a data dependency relationship with one another, includes determining an existence of invalidation information for invalidating at least a part of the data dependency relationship between the at least two of the plurality of macro tasks before compiling the sequential program into the segmented program, and generating the segmented program by compiling the sequential program into the segmented program with reference to a determination result of the existence of the invalidation information. When the invalidation information is determined to exist, the at least a part of the data dependency relationship is invalidated before the compiling of the sequential program into the segmented program.Type: GrantFiled: March 29, 2016Date of Patent: March 12, 2019Assignees: DENSO CORPORATION, WASEDA UNIVERSITYInventors: Yoshihiro Yatou, Noriyuki Suzuki, Kenichi Mineda, Hironori Kasahara, Keiji Kimura, Hiroki Mikami, Dan Umeda
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Patent number: 10228948Abstract: A computer obtains invalidation information that shows ignorable data dependency relationships from among a plurality of data dependency relationships, and extracts a synchronous-dependent relationship from among the ignorable data dependency relationships that are shown as a write-write to the same data by the invalidation information. Then, the computer generates a parallel program for maximizing the number of parallelized macro tasks by ignoring other data dependency relationships other than the extracted synchronous-dependent relationship while preventing simultaneous write to the same data by two macro tasks having the synchronous-dependent relationship.Type: GrantFiled: June 6, 2017Date of Patent: March 12, 2019Assignee: DENSO CORPORATIONInventor: Kenichi Mineda
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Publication number: 20170364341Abstract: A computer generates a parallel program, based on an analysis of a single program that includes a plurality of tasks written for a single-core microcomputer, by parallelizing parallelizable tasks for a multi-core processor having multiple cores. The computer includes a macro task (MT) group extractor that analyzes, or finds, a commonly-accessed resource commonly accessed by the plurality of tasks, and extracts a plurality of MTs showing access to such commonly-accessed resource. Then, the computer uses an allocation restriction determiner to allocate the extracted plural MTs to the same core in the multi-core processor. By devising a parallelization method described above, an overhead in an execution time of the parallel program by the multi-core processor is reduced, and an in-vehicle device is enabled to execute each of the MTs in the program optimally.Type: ApplicationFiled: June 8, 2017Publication date: December 21, 2017Inventor: Kenichi MINEDA
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Publication number: 20170357511Abstract: A computer obtains invalidation information that shows ignorable data dependency relationships from among a plurality of data dependency relationships, and extracts a synchronous-dependent relationship from among the ignorable data dependency relationships that are shown as a write-write to the same data by the invalidation information. Then, the computer generates a parallel program for maximizing the number of parallelized macro tasks by ignoring other data dependency relationships other than the extracted synchronous-dependent relationship while preventing simultaneous write to the same data by two macro tasks having the synchronous-dependent relationship.Type: ApplicationFiled: June 6, 2017Publication date: December 14, 2017Inventor: Kenichi MINEDA
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Publication number: 20170357491Abstract: A computer is configured to generate a parallel program for a multi-core microcomputer from a single program for a single-core microcomputer, based on a dependency analysis of a bundle of unit processes in the single program. The computer obtains dependency information that enables dependency determination of dependency un-analyzable unit processes. Further, the computer performs a dependency analysis of dependency analyzable unit processes. Then, the computer assigns the dependency un-analyzable unit processes and the dependency analyzable unit processes respectively to multiple cores of the multi-core microcomputer, while fulfilling dependency among those processes, based on the obtained dependency information of the dependency un-analyzable unit processes and an analysis result of the dependency analyzable unit processes.Type: ApplicationFiled: June 9, 2017Publication date: December 14, 2017Inventors: Kenichi MINEDA, Takayuki NAGAI, Yu NAKAGAWA
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Publication number: 20170168790Abstract: A method is for generating a parallel program for a multicore microcomputer from processes in a single program for a single core. The method includes extraction procedure, association procedure, and analysis procedure. The extraction procedure extracts (i) an extracted address of an accessed data item, which is among data items stored in a storage area together with the processes and accessed when each process is executed and (ii) an extracted symbol name of the accessed data item. The association procedure associates an associated address in the storage area storing the accessed data item of the extracted symbol name with the extracted symbol name. The analysis procedure analyzes a dependency between each process based on the extracted address and the associated address, and determines that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency.Type: ApplicationFiled: November 14, 2016Publication date: June 15, 2017Inventor: Kenichi MINEDA
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Publication number: 20170109216Abstract: A parallelization method for generating a parallel program for a multicore microcomputer from multiple processes in a single program for a single-core microcomputer is provided. In the single program, there are multiple types of the processes and a combination of the types of processes to be executed varies according to condition. The parallelization method includes extracting processing patterns respectively representing the combinations of types in the conditions from the single program and allocating the processes to the cores for each of the extracted processing patterns to generate the parallel program.Type: ApplicationFiled: September 29, 2016Publication date: April 20, 2017Inventor: Kenichi MINEDA
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Publication number: 20160291950Abstract: A parallelization compiling method for generating a segmented program from a sequential program, in which multiple macro tasks are included and at least two of the macro tasks have a data dependency relationship with one another, includes determining an existence of invalidation information for invalidating at least a part of the data dependency relationship between the at least two of the plurality of macro tasks before compiling the sequential program into the segmented program, and generating the segmented program by compiling the sequential program into the segmented program with reference to a determination result of the existence of the invalidation information. When the invalidation information is determined to exist, the at least a part of the data dependency relationship is invalidated before the compiling of the sequential program into the segmented program.Type: ApplicationFiled: March 29, 2016Publication date: October 6, 2016Inventors: Yoshihiro YATOU, Noriyuki SUZUKI, Kenichi MINEDA, Hironori KASAHARA, Keiji KIMURA, Hiroki MIKAMI, Dan UMEDA
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Publication number: 20160291949Abstract: A parallelization compiling method includes analyzing a sequential program prepared for a single-core processor; dividing the sequential program into a plurality of processes based on an analysis result; and generating a parallelized program, which is subjected to a parallelized execution by a multi-core processor, from the plurality of processes. The generating of the parallelized program includes compiling the plurality of processes under an execution order restriction defined based on a predetermined parameter.Type: ApplicationFiled: March 29, 2016Publication date: October 6, 2016Inventors: Kenichi MINEDA, Noriyuki SUZUKI, Hironori KASAHARA, Keiji KIMURA, Hiroki MIKAMI, Dan UMEDA