Abstract: A repeat-bit based system and method for executing zero overhead loops, or repeat loops, in an information processing chip that does not require a repeat end register or a dedicated comparator. Executing repeat loops requires a processor to iterate N times a code fragment of loop instructions. All systems providing this capability must know when to refetch the first loop instruction at the end of a repeat. To do this, the present invention adds a repeat bit to the processor's instruction set. This bit is set by the assembler/compiler that generates the executable code fragment comprising the repeat loop. Where the repeat loop includes plural instructions, the assembler sets the repeat bit of the penultimate loop instruction. As each loop instruction is fetched, decoded and executed, the decoder detects the repeat bit and passes it to loop control circuitry.

Abstract: A low power, adder-based circuit for accumulating small inputs is disclosed. Many applications running on large scale integrated circuits (LSIs) require small, two's complement inputs to be accumulated hundreds, or thousands, of times. Given the number of times such an accumulation is performed, it is essential that the LSI circuitry performing the accumulation operation is power efficient. It is also essential that the accumulator circuitry is compact and not overly complex to keep chip size and cost to a minimum. The present invention includes a input converter that shifts the inputs to be accumulated by a fixed positive amount, yielding a shifted input that is guaranteed to be a positive value. The adder then accumulates the positive shifted inputs. After all of the shifted inputs are accumulated, the adder adds a negative offset to the total to correct for the fixed positive mount added to each of the original inputs.

Abstract: After a silicon nitride film (2) is etched by using a first resist pattern (3A) as a mask before coating a second resist (4) superposing on the first resist pattern (3A), a surface layer portion of the first resist pattern (3A) is subjected to a plasma treatment by using oxygen (O.sub.2). A properties changed layer in the surface layer portion of the first resist pattern (3A) is removed or modified to improve the adhesion between the second resist (4) and the first resist pattern (3A), and the stripping of the second resist (4) is prevented.