Abstract: A system for transmitting and receiving image and audio data that is information on any of image and audio has a transmission apparatus and a reception apparatus. The transmission apparatus transmits the image and audio data using a multi-channel communication system and includes a first protocol conversion device. The reception apparatus receives the image and audio data using the multi-channel communication system and includes a second protocol conversion device. The transmission apparatus performs data conversion processing on the image and audio data by the first protocol conversion device using a protocol to produce parallel image and audio data, and transmits it to the reception apparatus using the multi-channel communication system. The reception apparatus receives the parallel data to perform data conversion processing on the parallel data using the protocol by the second protocol conversion device to return to the image and audio data.

Abstract: A data processing apparatus constitutes a low-cost audio/video data transmission and reception system. A reception buffer monitoring circuit 21 monitors the size of receiver data being accumulated in a reception buffer 6. When the size of accumulated data is found to become higher than a high threshold, the circuit 21 causes a reception clock generation circuit 8 to generate a reception clock with a higher frequency. When the accumulated data size becomes lower than a low threshold, the reception clock is generated with a lower frequency. Based on the reception clock fed from the reception clock generation circuit 8, an audio/video decoder 7 decodes the audio/video data coming from the reception buffer 6. The data processing apparatus applies advantageously to a television transmission and reception system for transmitting and receiving TV broadcast signals.

Abstract: A communication system, method and apparatus which can maintain favorable communication quality without imposing much burden upon a user. A plurality of communication networks are formed between first and second communication apparatus. Upon starting communication between the first and second apparatus, communication quality of the communication networks is measured using at least one of the communication apparatus. One of the communication apparatus is selected for communication based on a result of the measurement. The first and second apparatus may be a base apparatus and a portable terminal apparatus, respectively, for use in the home, in which the base apparatus receives a television broadcast and transmits a selected television program of the broadcast to the terminal apparatus for display thereon. The communication networks may include a radio network and a wireline network. The terminal apparatus may also be adapted to access the Internet via the base apparatus.

Abstract: A data processing apparatus constituting a low-cost audio/video data transmission and reception system is disclosed. A reception buffer monitoring circuit 21 monitors the size of receiver data being accumulated in a reception buffer 6. When the size of accumulated data is found to become higher than a high threshold, the circuit 21 causes a reception clock generation circuit 8 to generate a reception clock with a higher frequency. When the accumulated data size becomes lower than a low threshold, the reception clock is generated with a lower frequency. Based on the reception clock fed from the reception clock generation circuit 8, an audio/video decoder 7 decodes the audio/video data coming from the reception buffer 6. This invention applies advantageously to a television transmission and reception system for transmitting and receiving TV broadcast signals.

Abstract: A communication apparatus for performing half duplex communications has: a memory circuit storing transmission data; a transmission processing circuit generating a transmission frame; a transmission/reception processing circuit outputting as a transmission signal the transmission frame generated by the transmission processing circuit and generating a reception frame by receiving a transmission signal; and a transmission/reception managing circuit making the transmission processing circuit generate a transmission frame containing the transmission data in the confirmation response and supply the transmission frame to the transmission/reception processing circuit if a confirmation response to the reception of the transmission signal at the transmission/reception processing circuit is to be issued and if the transmission data is stored in the memory circuit.

Abstract: A data processing apparatus constituting a low-cost audio/video data transmission and reception system is disclosed. A reception buffer monitoring circuit 21 monitors the size of receiver data being accumulated in a reception buffer 6. When the size of accumulated data is found to become higher than a high threshold, the circuit 21 causes a reception clock generation circuit 8 to generate a reception clock with a higher frequency. When the accumulated data size becomes lower than a low threshold, the reception clock is generated with a lower frequency. Based on the reception clock fed from the reception clock generation circuit 8, an audio/video decoder 7 decodes the audio/video data coming from the reception buffer 6. This invention applies advantageously to a television transmission and reception system for transmitting and receiving TV broadcast signals.

Abstract: A system for transmitting and receiving image and audio data that is information on any of image and audio has a transmission apparatus and a reception apparatus. The transmission apparatus transmits the image and audio data using a multi-channel communication system and includes a first protocol conversion device. The reception apparatus receives the image and audio data using the multi-channel communication system and includes a second protocol conversion device. The transmission apparatus performs data conversion processing on the image and audio data by the first protocol conversion device using a protocol to produce parallel image and audio data, and transmits it to the reception apparatus using the multi-channel communication system. The reception apparatus receives the parallel data to perform data conversion processing on the parallel data using the protocol by the second protocol conversion device to return to the image and audio data.

Abstract: Radio communication apparatus includes a baseband processor for modulating data to be transmitted into an IF signal and for demodulating an IF signal derived from a received high frequency signal. A front end section receives the IF signal from the baseband processor and converts that IF signal into a high frequency signal for transmission. The front end section also is adapted to receive a high frequency signal from a remote location, and converts the received high frequency signal into an IF signal that is supplied to the baseband processor for demodulation and data recovery. The front end section is operable in a plurality of frequency bands and is tunable to a frequency within a selected one of the frequency bands for use as a radio frequency channel. Consequently, the number of simultaneously assigned channels in the same area can be markedly increased and the possibility of interrupting a communication link is significantly reduced.

Abstract: A communication apparatus for performing half duplex communications has: a memory circuit storing transmission data; a transmission processing circuit generating a transmission frame; a transmission/reception processing circuit outputting as a transmission signal the transmission frame generated by the transmission processing circuit and generating a reception frame by receiving a transmission signal; and a transmission/reception managing circuit making the transmission processing circuit generate a transmission frame containing the transmission data in the confirmation response and supply the transmission frame to the transmission/reception processing circuit if a confirmation response to the reception of the transmission signal at the transmission/reception processing circuit is to be issued and if the transmission data is stored in the memory circuit.

Abstract: A data processing apparatus constituting a low-cost audio/video data transmission and reception system is disclosed. A reception buffer monitoring circuit 21 monitors the size of receiver data being accumulated in a reception buffer 6. When the size of accumulated data is found to become higher than a high threshold, the circuit 21 causes a reception clock generation circuit 8 to generate a reception clock with a higher frequency. When the accumulated data size becomes lower than a low threshold, the reception clock is generated with a lower frequency. Based on the reception clock fed from the reception clock generation circuit 8, an audio/video decoder 7 decodes the audio/video data coming from the reception buffer 6. This invention applies advantageously to a television transmission and reception system for transmitting and receiving TV broadcast signals.

Abstract: A communication system, method and apparatus which can maintain favorable communication quality without imposing much burden upon a user. A plurality of communication networks are formed between first and second communication apparatus. Upon starting communication between the first and second apparatus, communication quality of the communication networks is measured using at least one of the communication apparatus. One of the communication apparatus is selected for communication based on a result of the measurement. The first and second apparatus may be a base apparatus and a portable terminal apparatus, respectively, for use in the home, in which the base apparatus receives a television broadcast and transmits a selected television program of the broadcast to the terminal apparatus for display thereon. The communication networks may include a radio network and a wireline network. The terminal apparatus may also be adapted to access the Internet via the base apparatus.

Abstract: Radio communication apparatus includes a baseband processor for modulating data to be transmitted into an IF signal and for demodulating an IF signal derived from a received high frequency signal. A front end section receives the IF signal from the baseband processor and converts that IF signal into a high frequency signal for transmission. The front end section also is adapted to receive a high frequency signal from a remote location, and converts the received high frequency signal into an IF signal that is supplied to the baseband processor for demodulation and data recovery. The front end section is operable in a plurality of frequency bands and is tunable to a frequency within a selected one of the frequency bands for use as a radio frequency channel. Consequently, the number of simultaneously assigned channels in the same area can be markedly increased and the possibility of interrupting a communication link is significantly reduced.

Abstract: Input matching is achieved for a high-frequency range having a center frequency of 0.8 GHz by a capacitor and a coil in an input matching circuit, and input matching is achieved for a high-frequency range having a center frequency of 1.9 GHz by another coil in the input matching circuit. Output matching is achieved for a high-frequency range having a center frequency of 0.8 GHz by a capacitor and a coil in an output matching circuit, and output matching is achieved for a high-frequency range having a center frequency of 1.9 GHz by another coil in the output matching circuit.

Abstract: A low power consumption mixing circuit and process comprise first and second field effect transistors "FETs." The first and second FETs each have at least a control electrode and a drive electrode. The drive electrodes of the first and second FETs are coupled together by a capacitor. An AC signal is supplied to the control electrode of the first FET through a first matching circuit, and the first FET amplifies the AC signal. The capacitor removes the DC component from the amplified AC signal that appears at the drive electrode of the first FET. The amplified AC signal, which is free from the DC component, is provided to the drive electrode of the second FET. A second AC signal is supplied to the control electrode of the second FET by another matching circuit. The second FET mixes the first and second AC signals that are supplied to the drive electrode of the second FET. This mixed signal is then provided through an output matching circuit as a mixed output signal.