Patents by Inventor Kenichi Takamiya
Kenichi Takamiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230247314Abstract: Suppressing a dead period at the time of mode switching. A solid-state imaging device includes: a plurality of pixels (300) that each outputs a luminance change of incident light; and a detection circuit (305) that outputs an event signal based on the luminance change output from each of the pixels, in which each of the pixels includes: a photoelectric conversion element (311) that generates a charge according to an incident light amount; a logarithmic conversion circuit (312, 313) that is connected to the photoelectric conversion element and converts a photocurrent flowing out of the photoelectric conversion element into a voltage signal corresponding to a logarithmic value of the photocurrent; and a first transistor (318) having a drain connected to a sense node of the logarithmic conversion circuit.Type: ApplicationFiled: April 23, 2021Publication date: August 3, 2023Inventors: Tsutomu Imoto, Yusuke Ikeda, Atsumi Niwa, Atsushi Suzuki, Shinichirou Etou, Kenichi Takamiya, Takuya Maruyama, Ren Hiyoshi
-
Patent number: 10917602Abstract: An imaging device comprising a pixel substrate including pixel element circuitry, a logic substrate including read circuitry configured to receive an output signal voltage from the pixel element circuitry, and electrically-conductive material arranged between the pixel substrate and the logic substrate, wherein the electrically-conductive material is configured to transfer at least one reference voltage from the logic substrate to the pixel substrate, wherein the electrically-conductive material comprises a Cu—Cu bonding portion.Type: GrantFiled: December 8, 2016Date of Patent: February 9, 2021Assignee: Sony CorporationInventors: Yasunori Tsukuda, Kenichi Takamiya
-
Patent number: 10674103Abstract: The present disclosure relates to a solid-state imaging device, an image pickup apparatus, and an electronic device capable of stably supplying high-speed control signals and clock signals. In the area AD method in which analog-digital conversion of a pixel signal is performed for each ADC area corresponding to a pixel group including a plurality of pixels, a repeater element is regularly arranged in each area group unit including one or more ADC areas, to re-drive control signals for controlling a plurality of the ADC areas. The present disclosure is applicable to a solid-state imaging device.Type: GrantFiled: March 31, 2017Date of Patent: June 2, 2020Assignee: SONY CORPORATIONInventors: Kenichi Takamiya, Yasunori Tsukuda
-
Patent number: 10313623Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: GrantFiled: December 19, 2017Date of Patent: June 4, 2019Assignee: Sony CorporationInventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Publication number: 20190124287Abstract: The present disclosure relates to a solid-state imaging device, an image pickup apparatus, and an electronic device capable of stably supplying high-speed control signals and clock signals. In the area AD method in which analog-digital conversion of a pixel signal is performed for each ADC area corresponding to a pixel group including a plurality of pixels, a repeater element is regularly arranged in each area group unit including one or more ADC areas, to re-drive control signals for controlling a plurality of the ADC areas. The present disclosure is applicable to a solid-state imaging device.Type: ApplicationFiled: March 31, 2017Publication date: April 25, 2019Inventors: KENICHI TAKAMIYA, YASUNORI TSUKUDA
-
Publication number: 20180376093Abstract: An imaging device comprising a pixel substrate including pixel element circuitry, a logic substrate including read circuitry configured to receive an output signal voltage from the pixel element circuitry, and electrically-conductive material arranged between the pixel substrate and the logic substrate, wherein the electrically-conductive material is configured to transfer at least one reference voltage from the logic substrate to the pixel substrate, wherein the electrically-conductive material comprises a Cu—Cu bonding portion.Type: ApplicationFiled: December 8, 2016Publication date: December 27, 2018Applicant: Sony CorporationInventors: Yasunori Tsukuda, Kenichi Takamiya
-
Publication number: 20180109748Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: ApplicationFiled: December 19, 2017Publication date: April 19, 2018Inventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 9900540Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: GrantFiled: February 10, 2017Date of Patent: February 20, 2018Assignee: Sony CorporationInventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Publication number: 20170155864Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: ApplicationFiled: February 10, 2017Publication date: June 1, 2017Inventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 9602748Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: GrantFiled: September 6, 2016Date of Patent: March 21, 2017Assignee: Sony CorporationInventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 9549136Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: GrantFiled: June 2, 2015Date of Patent: January 17, 2017Assignee: Sony CorporationInventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Publication number: 20160373681Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: ApplicationFiled: September 6, 2016Publication date: December 22, 2016Inventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 9307173Abstract: A signal processing circuit includes: a reference signal generating circuit that generates a reference signal of a ramp waveform of which a voltage value varies with the lapse of time by changing a current; and a signal processing unit including a plurality of processing sections that process the reference signal as a ramp wave and a potential of a supplied analog signal, wherein the reference signal processing circuit has a function of adjusting an offset of the reference signal by adjusting the current from the time of starting the generation of the reference signal or adjusting the level of the reference signal at least at the time of starting the generation of the reference signal.Type: GrantFiled: April 26, 2011Date of Patent: April 5, 2016Assignee: SONY CORPORATIONInventors: Kenichi Takamiya, Yuji Gendai, Yasuaki Hisamatsu, Tadafumi Nagata
-
Publication number: 20150271430Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: ApplicationFiled: June 2, 2015Publication date: September 24, 2015Inventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 9111837Abstract: The present invention relates to an image sensor capable of obtaining a good-quality image with a simple configuration. A pixel accumulates a charge by performing photoelectric conversion on incident light, and outputs a pixel signal corresponding to the charge. A vertical scanning circuit controls the pixel to cause the pixel to perform a shutter process of discharging an unnecessary charge accumulated in the pixel, a charge accumulation process of accumulating a charge generated through photoelectric conversion in a predetermined exposure time in the pixel, and a read process of outputting a pixel signal corresponding to the charge accumulated in the pixel in the charge accumulation process.Type: GrantFiled: September 10, 2008Date of Patent: August 18, 2015Assignee: SONY CORPORATIONInventors: Kenichi Takamiya, Ken Koseki
-
Patent number: 9071783Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: GrantFiled: June 26, 2013Date of Patent: June 30, 2015Assignee: SONY CORPORATIONInventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 8742313Abstract: A solid-state imaging device includes: a pixel array unit that includes a plurality of pixels arranged two dimensionally and a plurality of read-out signal lines used for reading out pixel signals from the plurality of pixels; test voltage applying units that are disposed at the read-out signal lines and apply test voltages of various voltage levels to the read-out signal lines; a reference voltage generating circuit that includes a MOS transistor used for generating a reference voltage and can change an operating point of the MOS transistor; and an operating point control unit that controls a process of adjusting the operating point of the MOS transistor based on the test voltages and the reference voltage.Type: GrantFiled: October 5, 2011Date of Patent: June 3, 2014Assignee: Sony CorporationInventors: Kenichi Takamiya, Junji Toyomura
-
Publication number: 20140022430Abstract: There is provided a solid-state imaging device including an imaging unit including a plurality of image sensors, and an analog to digital (AD) conversion unit including a plurality of AD converters arranged in a row direction, each AD converter performing AD conversion of an electrical signal output by the image sensor. Each of the AD converters includes a comparator having a differential pair at an input stage, the differential pair including a first transistor and a second transistor, the first and second transistors are each divided into an equal number of a plurality of division transistors, and an arrangement pattern of the plurality of division transistors constituting the comparator in a predetermined column and an arrangement pattern of the plurality of division transistors constituting the comparator in an adjacent column adjacent to the predetermined column are different from each other.Type: ApplicationFiled: June 26, 2013Publication date: January 23, 2014Inventors: Yosuke Ueno, Natsuko Seino, Kenichi Takamiya
-
Patent number: 8427566Abstract: A pixel drive circuit including a plurality of pixel circuits, each including a photoelectric converting unit for converting an incident light into an electric charge and accumulating the converted electric charge, the plurality of pixel circuits being arranged in a matrix shape, an address decoder for selecting the pixel circuits to be controlled which are arranged on an identical line, a storage circuit for storing operation information to be executed by the pixel circuits selected by the address decoder, and a control circuit for controlling an operation of the pixel circuits selected by the address decoder in accordance with a storage state of the storage circuit. The control circuit controls a charge discharging operation of discharging an electric charge remaining in the photoelectric converting unit of each of the pixel circuits. The storage circuit holds the storage state until the charge discharging operation is completed.Type: GrantFiled: May 4, 2011Date of Patent: April 23, 2013Assignee: Sony CorporationInventors: Noritaka Fujita, Kenichi Takamiya, Ken Koseki, Hiroki Ui
-
Patent number: 8314871Abstract: A pixel drive circuit includes a plurality of pixel circuits each including a photoelectric converting unit for converting an incident light into an electric charge and accumulating the converted electric charge, the plurality of pixel circuits being arranged in a matrix shape, an address decoder for selecting the pixel circuits to be controlled which are arranged on an identical line, a storage circuit for storing operation information to be executed by the pixel circuits selected by the address decoder, and a control circuit for controlling an operation of the pixel circuits selected by the address decoder in accordance with a storage state of the storage circuit. The control circuit controls a charge discharging operation of discharging an electric charge remaining in the photoelectric converting unit of each of the pixel circuits. The storage circuit holds the storage state until the charge discharging operation is completed.Type: GrantFiled: September 19, 2008Date of Patent: November 20, 2012Assignee: Sony CorporationInventors: Noritaka Fujita, Kenichi Takamiya, Ken Koseki, Hiroki Ui