Patents by Inventor Kenichi Tanahashi

Kenichi Tanahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100157161
    Abstract: According to one embodiment, a gamma correction apparatus comprises a histogram module configured to acquire histograms of upper and lower portions of one frame which are obtained by dividing the frame into two by a given horizontal scanning line, and a correcting module configured to make gamma correction on a current frame based on the histogram of the upper portion of the current frame and the histogram of the lower portion of a preceding frame.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 24, 2010
    Inventor: Kenichi Tanahashi
  • Publication number: 20050086518
    Abstract: The purpose of this invention is to prevent damages caused by illegal copying in a system of providing a user with a content including music, games and others through any communication network. An optional content is transmitted from a contents site of a content provider to a user through a communication network, and the user receives the transmitted content, but if the user copies the received content, the data on his recording is notified to the provider's contents site.
    Type: Application
    Filed: November 17, 2004
    Publication date: April 21, 2005
    Inventor: Kenichi Tanahashi
  • Publication number: 20010023427
    Abstract: The purpose of this invention is to prevent damages caused by illegal copying in a system of providing a user with a content including music, games and others through any communication network.
    Type: Application
    Filed: March 1, 2001
    Publication date: September 20, 2001
    Inventor: Kenichi Tanahashi
  • Patent number: 4466056
    Abstract: An address converting and generating system for an information processing system is disclosed. The address converting and generating system includes a segment type memory and an instruction having an operation code part, a field for specifying a register for loading a physical address representing a segment relative address, and a displacement for specifying a logical address. This instruction is decoded by an instruction decoder, and the physical address is generated from the logical address by referring to a segment table directory and a segment table. The generated physical address is loaded, together with a segment base address, a segment table number, and a segment table entry, in a register specified by the register specifying field. An effective address is generated by addition of the contents of the specified register and the address specified by the displacement. The system further has an instruction for generating a logical address from a physical address.
    Type: Grant
    Filed: July 31, 1981
    Date of Patent: August 14, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Kenichi Tanahashi