Patents by Inventor Kenichi Ueno

Kenichi Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250040518
    Abstract: There is provided a health condition determination apparatus including: a behavior data acquisition part that acquires behavior data indicating a behavior of an animal acquired by executing at least one of monitoring and sensing on the animal; a behavior data accumulation part that accumulates the behavior data; and a health condition estimation part that estimates a health condition of the animal by using the behavior data.
    Type: Application
    Filed: December 16, 2022
    Publication date: February 6, 2025
    Applicant: NEC Communication Systems, Ltd.
    Inventors: Masakazu KANEDA, Kenichi ABE, Momo SUTO, Chikashi ITO, Tetsuya ITO, Akira MATSUMOTO, Norihiko KAMATA, Satoki UENO
  • Publication number: 20250021917
    Abstract: An evaluation apparatus includes: an evaluation method acquisition part configured to acquire evaluation method data from an evaluation method provision apparatus; an evaluation criteria creation part configured to create evaluation criteria information for evaluating collected information that integrates data collected from a field management system that manages field information based on the evaluation method data; an evaluation processing part configured to evaluate the collected information based on the evaluation criteria information and create an evaluation result.
    Type: Application
    Filed: December 16, 2022
    Publication date: January 16, 2025
    Applicant: NEC Communication Systems, Ltd.
    Inventors: Akira MATSUMOTO, Momo Suto, Kenichi Abe, Chikashi Ito, Tetsuya Ito, Norihiko Kamata, Masakazu Kaneda, Satoki Ueno
  • Patent number: 11475841
    Abstract: A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: October 18, 2022
    Assignee: Apple Inc.
    Inventors: Shingo Hatanaka, Derek Keith Shaeffer, Kenichi Ueno, Masaki Kinoshita, Nobutaka Shimamura
  • Publication number: 20210056907
    Abstract: A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 25, 2021
    Inventors: Shingo Hatanaka, Derek Keith Shaeffer, Kenichi Ueno, Masaki Kinoshita, Nobutaka Shimamura
  • Patent number: 10438535
    Abstract: A display device may include a plurality of pixels that display image data on a display, a digital-to-analog converter that outputs a voltage that corresponds to a luminance value to be depicted on a first pixel, and a circuit that amplifies the voltage and outputs an amplified voltage to the first pixel. The circuit may include a capacitor that receives the voltage via the digital-to-analog converter and an amplifier coupled to the capacitor. The amplifier generates the amplified voltage based on the voltage stored the capacitor. The circuit also include switches that couple a first terminal of the capacitor to an output of the amplifier during a first amount of time and couples a second terminal of the capacitor to the output of the amplifier after the first amount of time expires.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: October 8, 2019
    Assignee: Apple Inc.
    Inventors: Derek K. Shaeffer, Jesse A. Richmond, Kenichi Ueno, Kingsuk Brahma, Mohammad B. Vahid Far, Shingo Hatanaka, Yafei Bi
  • Publication number: 20180082638
    Abstract: A display device may include a plurality of pixels that display image data on a display, a digital-to-analog converter that outputs a voltage that corresponds to a luminance value to be depicted on a first pixel, and a circuit that amplifies the voltage and outputs an amplified voltage to the first pixel. The circuit may include a capacitor that receives the voltage via the digital-to-analog converter and an amplifier coupled to the capacitor. The amplifier generates the amplified voltage based on the voltage stored the capacitor. The circuit also include switches that couple a first terminal of the capacitor to an output of the amplifier during a first amount of time and couples a second terminal of the capacitor to the output of the amplifier after the first amount of time expires.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 22, 2018
    Inventors: Derek K. Shaeffer, Jesse A. Richmond, Kenichi Ueno, Kingsuk Brahma, Mohammad B. Vahid Far, Shingo Hatanaka, Yafei Bi
  • Publication number: 20170075553
    Abstract: A method of controlling indication is executed by a user terminal device when displaying predetermined indication information on a display unit showing an operational area on which an operation from a user can be received. The method includes adjusting the indication information so as to prevent the operation from the user on the operational area, from being hindered by the indication information.
    Type: Application
    Filed: March 14, 2016
    Publication date: March 16, 2017
    Inventor: KENICHI UENO
  • Publication number: 20140305468
    Abstract: The present invention relates to a method for effectively exfoliating a coating layer from the surface of the conductive substrate of a used electrode for electrolysis comprising an insoluble metal electrode having the coating layer containing electrode substance comprising noble metals and/or their metal oxides on the surface of the used electrode substrate comprising valve metals, such as titanium and tantalum or valve metal alloys, and then to recover the electrode substances and/or electrode substrate for recycling use. The method for exfoliating comprises the steps of treating the insoluble metal electrode surface having the coating layer, in succession, with an alkali treatment process using a caustic alkali aqueous solution, a heating and a baking process and an acid treatment process, the alkali treatment process being conducted by applying an alkali treatment solution prepared by adding thickener to the caustic alkali aqueous solution.
    Type: Application
    Filed: November 20, 2012
    Publication date: October 16, 2014
    Inventors: Nobuyuki Kawaguchi, Kenichi Ueno, Tomotsu Hayashi, Miho Kagami
  • Patent number: 8350553
    Abstract: An object of the present invention is to generate a reference voltage that is stable in relation to manufacturing process variations, by matching the operating regions of the MOSFETs contributing to generation of the reference voltage.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: January 8, 2013
    Assignee: National University Corporation Hokkaido University
    Inventors: Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya, Kenichi Ueno
  • Patent number: 7976150
    Abstract: An inkjet recording apparatus, including a recording head having a nozzle array to eject photo-curable ink onto a recording medium, and a radiating device which is placed next to the recording head, and which radiates an ink-curing light onto the photo-curable ink ejected on the recording medium, wherein the radiating device includes a plurality of light source units which radiate photo-curable ink, and a plurality of flow channels which are mounted to intersect with the nozzle array, and in which cooling water is made to flow to cool the plurality of the light source units.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: July 12, 2011
    Assignee: Konica Minolta Medical & Graphics, Inc.
    Inventor: Kenichi Ueno
  • Publication number: 20100164461
    Abstract: An object of the present invention is to generate a reference voltage that is stable in relation to manufacturing process variations, by matching the operating regions of the MOSFETs contributing to generation of the reference voltage.
    Type: Application
    Filed: July 16, 2008
    Publication date: July 1, 2010
    Inventors: Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya, Kenichi Ueno
  • Publication number: 20080136858
    Abstract: An inkjet recording apparatus, including a recording head having a nozzle array to eject photo-curable ink onto a recording medium, and a radiating device which is placed next to the recording head, and which radiates an ink-curing light onto the photo-curable ink ejected on the recording medium, wherein the radiating device includes a plurality of light source units which radiate photo-curable ink, and a plurality of flow channels which are mounted to intersect with the nozzle array, and in which cooling water is made to flow to cool the plurality of the light source units.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 12, 2008
    Inventor: Kenichi UENO
  • Patent number: 6432293
    Abstract: A process for copper-plating a wafer which comprises electroplating a semiconductor wafer with an electrode comprising a corrosion-resistant metal substrate and a coat mainly composed of iridium oxide provided on the substrate as an anode and the wafer as a cathode in a solution containing copper ion. The anode is preferably an insoluble electrode comprising a corrosion-resistant metal substrate and a coat mainly composed of iridium oxide and further containing a metal or metal oxide selected from platinum, tantalum, titanium, niobium and oxides of these metals provided on the substrate. A neutral membrane or ion exchange membrane may be interposed between the anode and the cathode as a separating membrane.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: August 13, 2002
    Assignee: Permelec Electrode Ltd.
    Inventors: Setsuro Ogata, Kenichi Ueno
  • Patent number: 5143593
    Abstract: A method of copper-plating a material whereby electrolysis is performed using an electrolytic plating cell including a diaphragm which separates an anode chamber having therein an insoluble metal electrode as an anode from a cathode chamber having therein the material to be plated as a cathode, and further using an electrolyte solution containing copper ions and an additive, wherein the electrolyte is fed to the cathode chamber in a manner such that the copper ion concentration in the electrolyte within the cathode chamber is kept constant and electrolyte is further fed to the anode chamber at a rate of from about 0.2 to 11 ml/KAh.
    Type: Grant
    Filed: June 18, 1991
    Date of Patent: September 1, 1992
    Assignee: Permelec Electrode Ltd.
    Inventors: Kenichi Ueno, Kazuhiro Hirao, Genzo Yamane
  • Patent number: 5102521
    Abstract: According to the present invention, an upper electrode and a lower electrode are integrally assembled with insoluble electrodes and diaphragmn in diaphragm electrode structure. Small holes are furnished on the upper electrode, and the diaphragm of the upper electrode is installed obliquely with degassing means. By simply carrying the objects to be plated in horizontal direction, uniform and high quality electroplating can be continuously performed with extensive increase in productivity, while enjoying all of the benefits such as shorter interpolar distance between two electrodes, compact design of the apparatus, saving of expensive additives, etc. Further, the inspection of the diaphragm and the like can be rapidly and easily accomplished, and perfect protection of the diaphragm is assured, thus providing a horizontal carrying type electroplating apparatus suitable for practical use.
    Type: Grant
    Filed: August 5, 1991
    Date of Patent: April 7, 1992
    Assignees: Almex Inc., Permelec Electrode Ltd.
    Inventors: Hitoshi Usuda, Ryoei Yamakawa, Kenichi Ueno, Kazuhiro Hirao