Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate on which a plurality of pixels are arranged, a transparent substrate including a first through via provided in an opening formed in advance to extend through, an adhesive including a second through via connected to the first through via and configured to bond the semiconductor substrate and the transparent substrate while exposing the pixels, and an imaging lens unit arranged on the transparent substrate.

Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate which includes a first surface and a second surface opposite to the first surface, a pixel which is provided in the semiconductor substrate and which photoelectrically converts light emitted via a lens on the second surface, a support substrate which is provided on a first insulating layer covering an element on the first surface and which includes a trench, and a first device which is provided on the first insulating layer and which is accommodated in the trench of the support substrate.

Abstract: According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

Abstract: According to one embodiment, a semiconductor device includes the following structure. The first insulating film is formed on a first major surface of a semiconductor substrate. The electrode pad is formed in the first insulating film. The electrode pad includes a conductive film. At least a part of the conductive film includes a free region in which the conductive film is not present. The external connection terminal is formed on a second major surface facing the first major surface. The through-electrode is formed in a through-hole formed from the second major surface side of the semiconductor substrate and reaching the electrode pad. The first insulating film is present in the free region, and a step, on a through-electrode side, between the first insulating film being present in the free region and the electrode pad is not greater than a thickness of the electrode pad.

Abstract: A solid-state imaging device includes an imaging element, an external terminal, an insulating film, a through-electrode and a first electrode. The imaging element is formed on a first major surface of a semiconductor substrate. The external terminal is formed on a second major surface opposing the first major surface of the semiconductor substrate. The insulating film is formed in a through-hole formed in the semiconductor substrate. The through-electrode is formed on the insulating film in the through-hole and electrically connected to the external terminal. The first electrode is formed on the through-electrode on the first major surface of the semiconductor substrate. When viewed from a direction perpendicular to the first major surface of the semiconductor substrate, an outer shape with which the insulating film and the semiconductor substrate are in contact is larger than an outer shape of the first electrode.

Abstract: A method for manufacturing a semiconductor device, includes: preparing a semiconductor substrate with a first notch; preparing a supporting substrate with a second notch; laminating the semiconductor substrate with the supporting substrate so that the first notch can be matched with the second notch; and processing a second main surface of the semiconductor substrate opposite to a first main surface thereof facing to the supporting substrate to reduce a thickness of the semiconductor substrate to a predetermined thickness.

Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate which includes a first surface and a second surface opposite to the first surface, a pixel which is provided in the semiconductor substrate and which photoelectrically converts light emitted via a lens on the second surface, a support substrate which is provided on a first insulating layer covering an element on the first surface and which includes a trench, and a first device which is provided on the first insulating layer and which is accommodated in the trench of the support substrate.

Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate on which a plurality of pixels are arranged, a transparent substrate including a first through via provided in an opening formed in advance to extend through, an adhesive including a second through via connected to the first through via and configured to bond the semiconductor substrate and the transparent substrate while exposing the pixels, and an imaging lens unit arranged on the transparent substrate.

Abstract: A method for manufacturing a semiconductor device, includes: preparing a semiconductor substrate with a first notch; preparing a supporting substrate with a second notch; laminating the semiconductor substrate with the supporting substrate so that the first notch can be matched with the second notch; and processing a second main surface of the semiconductor substrate opposite to a first main surface thereof facing to the supporting substrate to reduce a thickness of the semiconductor substrate to a predetermined thickness.

Abstract: A method for manufacturing a semiconductor device, includes: preparing a semiconductor substrate with a first notch; preparing a supporting substrate with a second notch; laminating the semiconductor substrate with the supporting substrate so that the first notch can be matched with the second notch; and processing a second main surface of the semiconductor substrate opposite to a first main surface thereof facing to the supporting substrate to reduce a thickness of the semiconductor substrate to a predetermined thickness.

Abstract: According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

Abstract: According to one embodiment, a semiconductor device includes the following structure. The first insulating film is formed on a first major surface of a semiconductor substrate. The electrode pad is formed in the first insulating film. The electrode pad includes a conductive film. At least a part of the conductive film includes a free region in which the conductive film is not present. The external connection terminal is formed on a second major surface facing the first major surface. The through-electrode is formed in a through-hole formed from the second major surface side of the semiconductor substrate and reaching the electrode pad. The first insulating film is present in the free region, and a step, on a through-electrode side, between the first insulating film being present in the free region and the electrode pad is not greater than a thickness of the electrode pad.

Abstract: A semiconductor device comprises a semiconductor substrate, a through contact and a metal film. The semiconductor substrate has a semiconductor element at a first face. The wiring pattern includes a grounding line and is located at a side of a second face opposite to the first face of the semiconductor substrate. The through contact penetrates the semiconductor substrate from the first face to the second face and electrically connects between the semiconductor element and the wiring pattern. The metal film is located between the second face of the semiconductor substrate and a face where the wiring pattern exists and electrically connected with the grounding line.

Abstract: According to one embodiment, a solid-state imaging device includes a substrate, a lens, a lens holder, and a metal shield. The substrate includes a pixel region having a first well and has a second well at a periphery thereof, the second well being independent of the first well. The lens is provided above the pixel region in the substrate. The lens holder holds the lens.

Abstract: A solid-state imaging device includes an imaging element, an external terminal, an insulating film, a through-electrode and a first electrode. The imaging element is formed on a first major surface of a semiconductor substrate. The external terminal is formed on a second major surface opposing the first major surface of the semiconductor substrate. The insulating film is formed in a through-hole formed in the semiconductor substrate. The through-electrode is formed on the insulating film in the through-hole and electrically connected to the external terminal. The first electrode is formed on the through-electrode on the first major surface of the semiconductor substrate. When viewed from a direction perpendicular to the first major surface of the semiconductor substrate, an outer shape with which the insulating film and the semiconductor substrate are in contact is larger than an outer shape of the first electrode.

Abstract: A semiconductor substrate has a first principal face and a second principal face opposite thereto. A pixel unit, an analog circuit and a digital circuit are formed in a first, second and third region of the semiconductor substrate. An interconnect is formed on each of the first and second principal faces of the second region. A plurality of penetrative electrodes is formed in the semiconductor substrate to penetrate the first and second principal faces. These penetrative electrodes are electrically connected with interconnects formed in the first and second principal faces of the second region. A guard ring is formed in the semiconductor substrate to penetrate the first and second principal faces, the guard ring is surrounding the penetrative electrodes.

Abstract: A method for manufacturing a semiconductor device, includes: preparing a semiconductor substrate with a first notch; preparing a supporting substrate with a second notch; laminating the semiconductor substrate with the supporting substrate so that the first notch can be matched with the second notch; and processing a second main surface of the semiconductor substrate opposite to a first main surface thereof facing to the supporting substrate to reduce a thickness of the semiconductor substrate to a predetermined thickness.

Abstract: The process fault analyzer includes a process data editing part for extracting a process characteristic quantity from process data in a time series stored in a process data storing part, a fault analysis rule data storing part for storing a fault analysis rule for performing fault detection on a product manufactured in a manufacturing system and on manufacturing equipment, based on the process characteristic quantity, and a fault determining part for determining existence/absence of a fault in a product and in manufacturing equipment based on the process characteristic quantity. A partial least square regression (PLS) model is used as an estimation model used for the fault analysis rule. Also, Q statistics and T2 statistics are used, and the fault determining part determines a fault in manufacturing equipment when values of the statistics are the same as set value or more.

Abstract: A process fault analyzer, capable of analyzing fault caused due to a process performed by a plurality of process equipments, is provided. The analyzer includes: a plurality of process data storing units which store process data of the respective process equipments; a process data editing unit which calculates process characteristic quantity from various kinds of process data stored on the process data storing units; a plurality of process characteristic quantity data storing units which store process characteristic quantity of the respective process equipments calculated by the process data editing unit; a process characteristic quantity integration unit which accesses the process characteristic quantity data storing units, extracts process characteristic quantity of the same wafer, and integrates them; and a fault determination unit which determines presence or absence of fault according to the integrated process characteristic quantity data integrated by the process characteristic quantity integration unit.

Abstract: A process fault analysis apparatus according to the present invention includes a process data editing unit which extracts process features from process data stored in a process data storage unit and stores the process features in a process feature data storage unit, a fault analysis rule data storage unit in which a fault analysis rule for performing fault detection and fault factor analysis from the process features is stored, a fault judgment unit which performs fault detection and fault factor analysis from the process features using the fault analysis rule, and a unit which outputs fault notification information when the fault judgment unit judges that the fault is generated. In the fault factor analysis, a contribution ratio indicating which process feature has how much influence on the fault is determined, and the process feature having the higher contribution ratio is set at the fault factor.