Patents by Inventor Kenji Chao

Kenji Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ANTI-TAMPER PROTECTED ENCLOSURE
    Publication number: 20110122563
    Abstract: A device for containing sensitive data including a housing, an anti-tamper protected enclosure located within the housing and being adapted to contain the sensitive data, anti-tamper protection circuitry located within the anti-tamper protected enclosure and at least one ball grid array arranged within the housing and mounted on an outer surface of the anti-tamper protected enclosure and electrically coupled to the anti-tamper protection circuitry for protecting against unauthorized access to the interior of the anti-tamper protected enclosure.
    Type: Application
    Filed: January 27, 2011
    Publication date: May 26, 2011
    Applicant: VERIFONE, INC.
    Inventors: Steve Hsu, Daniel Hong, Kenji Chao, Douglas Manchester
  • Anti-tamper protected enclosure
    Patent number: 7898413
    Abstract: A device for containing sensitive data including a housing, an anti-tamper protected enclosure located within the housing and being adapted to contain the sensitive data, anti-tamper protection circuitry located within the anti-tamper protected enclosure and at least one ball grid array arranged within the housing and mounted on an outer surface of the anti-tamper protected enclosure and electrically coupled to the anti-tamper protection circuitry for protecting against unauthorized access to the interior of the anti-tamper protected enclosure.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: March 1, 2011
    Assignee: Verifone, Inc.
    Inventors: Steve Hsu, Daniel Hong, Kenji Chao, Douglas Manchester
  • ANTI-TAMPER PROTECTED ENCLOSURE
    Publication number: 20080180245
    Abstract: A device for containing sensitive data including a housing, an anti-tamper protected enclosure located within the housing and being adapted to contain the sensitive data, anti-tamper protection circuitry located within the anti-tamper protected enclosure and at least one ball grid array arranged within the housing and mounted on an outer surface of the anti-tamper protected enclosure and electrically coupled to the anti-tamper protection circuitry for protecting against unauthorized access to the interior of the anti-tamper protected enclosure.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Applicant: VERIFONE, INC.
    Inventors: Steve Hsu, Daniel Hong, Kenji Chao, Douglas Manchester