Patents by Inventor Kenji Fukunabe

Kenji Fukunabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7000312
    Abstract: In a circuit board, when lands provided on a rear surface of a substrate are each separated into a mainland and a sub-land, warping or other defects of the substrate can be ignored when soldering, and the substrate can be mounted with a high bonding strength. On the rear surface of a module substrate, partitions are each provided to separate a metal film into the mainland and the sub-land. Accordingly, when the substrate is mounted on a motherboard, solder applied beforehand from each end-surface electrode to the mainland can be largely protruded downward from the mainland, and warping or other defects of the substrate can be ignored by this protruding portion of the solder. In addition, in the state in which the substrate is mounted, since the solder is pushed out from between the mainland and the motherboard and overflows the partition, both the mainland and the sub-land can be soldered to the motherboard side, and hence stable bonding can be obtained at a large bonding area.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: February 21, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Fukunabe, Masanobu Okada, Kazuyoshi Nakaya
  • Publication number: 20030117784
    Abstract: In a circuit board, when lands provided on a rear surface of a substrate are each separated into a mainland and a sub-land, warping or other defects of the substrate can be ignored when soldering, and the substrate can be mounted with a high bonding strength. On the rear surface of a module substrate, partitions are each provided to separate a metal film into the mainland and the sub-land. Accordingly, when the substrate is mounted on a motherboard, solder applied beforehand from each end-surface electrode to the mainland can be largely protruded downward from the mainland, and warping or other defects of the substrate can be ignored by this protruding portion of the solder. In addition, in the state in which the substrate is mounted, since the solder is pushed out from between the mainland and the motherboard and overflows the partition, both the mainland and the sub-land can be soldered to the motherboard side, and hence stable bonding can be obtained at a large bonding area.
    Type: Application
    Filed: December 3, 2002
    Publication date: June 26, 2003
    Inventors: Kenji Fukunabe, Masanobu Okada, Kazuyoshi Nakaya
  • Patent number: 6075782
    Abstract: A free channel detecting method and device which can detect without fail a free channel regardless of the presence of an interfering wave which partly overlaps with the head and end of a slot configuring a time division channel. Output of an envelope detection circuit for detecting an envelope of a received signal is added to a peak hold circuit, and a free channel is detected according to the output of the peak hold circuit.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: June 13, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toru Mizumoto, Kenji Fukunabe