Abstract: When making a growth mask on a substrate and using the growth mask to selectively grow nitride III-V compound semiconductors on the substrate, a multi-layered film including a nitride forming at least its top surface is used as the growth mask. The growth mask may be combination of an oxide film and a nitride film thereon, combination of a metal film and a nitride film thereon, combination of an oxide film, a film thereon made up of a nitride and an oxide, and a nitride film thereon, or combination of a first metal film, a second metal film thereon different from the first metal film and a nitride film thereon, for example. The oxide film may be a Si02, for example, the nitride film may be a TiN film or a SiN film, the film made up of a nitride and an oxide may be a SiNO film, and the metal film may be a Ti film or a Pt film, for example.

Abstract: A semiconductor thin film includes an underlying semiconductor layer in which a plurality of facets are arranged, and a selectively grown/buried semiconductor layer formed to cover the underlying semiconductor layer, wherein the facets are formed by planes tilted with respect to the disposition plane of the underlying semiconductor layer. In this semiconductor thin film, threading-dislocations are formed in the selectively grown/buried semiconductor layer in such a manner that each of the threading-dislocations bendingly extends from one of the facets of the underlying semiconductor layer in the direction substantially along the disposition plane of the underlying semiconductor layer, being joined to another of the threading-dislocations bendingly extending from the opposed one of the facets, and bendingly extends from the joined portion in the direction crossing the disposition plane of the underlying semiconductor layer.

Abstract: A semiconductor thin film includes an underlying semiconductor layer in which a plurality of facets are arranged, and a selectively grown/buried semiconductor layer formed to cover the underlying semiconductor layer, wherein the facets are formed by planes tilted with respect to the disposition plane of the underlying semiconductor layer. In this semiconductor thin film, threading-dislocations are formed in the selectively grown/buried semiconductor layer in such a manner that each of the threading-dislocations bendingly extends from one of the facets of the underlying semiconductor layer in the direction substantially along the disposition plane of the underlying semiconductor layer, being joined to another of the threading-dislocations bendingly extending from the opposed one of the facets, and bendingly extends from the joined portion in the direction crossing the disposition plane of the underlying semiconductor layer.

Abstract: A luminous intensity of a semiconductor light emitting device having a multi-layer structure formed of nitride group III-V compound semiconductors is improved by having a thickness d of a light emitting layer (active layer) of the semiconductor light emitting device having a multi-layer structure of nitride group III-V compound semiconductors ranging from 0.3 nm to 1.5 nm.

Abstract: A luminous intensity of a semiconductor light emitting device having a multi-layer structure formed of nitride group III-V compound semiconductors is improved by having a thickness d of a light emitting layer (active layer) of the semiconductor light emitting device having a multi-layer structure formed of nitride group III-V compound semiconductors ranging from 0.3 nm to 1.5 nm.

Abstract: A method for growing a single crystal III-V compound semiconductor layer, in which grown by vapor deposition on a first single crystal III-V compound semiconductor layer including at least Ga and N is a second single crystal III-V compound semiconductor layer different from the first layer and including at least Ga and N, comprises the steps of: growing a buffer layer other than single crystal and having substantially the same composition as that of the second layer by vapor deposition on the first layer; and growing the second layer on the buffer layer. A method for growing a single crystal AlGaN layer on a single crystal GaN layer by vapor deposition, comprises the steps of: growing a buffer layer of a III-V compound semiconductor including at least Ga and N on the single crystal GaN layer by vapor deposition; and growing the single crystal AlGaN layer on the buffer layer by vapor deposition.

Abstract: A semiconductor device using interference effects of electron waves passing through a multichannel, wherein the multichannel is formed by a Dirac-delta-doped layer. A method of manufacturing a semiconductor device comprising the steps of: selectively forming a region of a predetermined crystallographic orientation onto a semiconductor substrate; and alternately growing the first semiconductor layer and the second semiconductor layer whose electron affinity is smaller than that of the first semiconductor layer onto the region of the predetermined crystallographic orientation by a vapor-phase growth method so as to have a convex shape in a manner such that an area of an upper layer is smaller. A semiconductor device in which a channel portion comprising a zigzag fine line is provided between a source and a drain.

Abstract: In quantum effect devices using quantum dots, a novel quantum effect device which controls the probability of tunnel transition of electrons among quantum dots to obtain quantum effects such as band gap modulation. i-GaAs layers serving as the quantum dots are formed on an n-AlGaAs substrate and, further, n-AlGaAs layers are formed as electron supply layers on the i-GaAs layers. By this double heterojunction structure, channels are formed in the i-GaAs layers near the two junction surfaces sandwiching the layers. On the other hand, a potential barrier layer comprised of an i-AlGaAs layer with a small barrier height with respect to the quantum dots and an SiO.sub.2 layer with a large barrier height laminated together is formed between the quantum dots. The position of the lamination interface in the potential barrier layer is set to a height enabling the two layers to contact the quantum dots.

Abstract: A fine pattern formation using an electron beam induced resist, and use of the resist in making semiconductor devices are disclosed. Collimated electron beam is irradiated and scanned along a desired pattern on a layer on which a resist layer of a desired pattern is deposited under an atmosphere containing a starting material layer for the resist. The resist thus deposited is partially removed by reactive ion etching to remove the skirt like portion of the resist layer, or totally removed by reactive ion etching during or after processing by using the resist layer as a processing mask. Since the resist layer width is determined by a diameter of the collimated electron beam, line width of less than hundred .ANG. can be directly drawn. There are also disclosed processes using the resist layer in manufacturing semiconductor devices.

Abstract: In a method for forming a pattern, by selectively irradiating a charged particle beam onto a substrate in an atmosphere containing a raw material gas, a resist pattern comprising a material which is produced on the substrate from the raw material gas is formed, wherein a pressure of the raw material gas is set to 10.sup.-7 to 10.sup.-5 Torr, an accelerating voltage of the charged particle beam is set to 0.5 to 6 kV, and a beam current of the charged particle beam is set to 10.sup.-13 to 10.sup.-7 A. Thus, a resist pattern of an ultrafine width can be stably formed in a relatively short time.

Abstract: A superconducting electron device is disclosed, in which a pair of parallel superconducting channels each having a Josephson junction therein are provided between source and drain electrodes, and a gate electrode is provided to apply a voltage to the channels to make potentials at each channels different to each other. The current flow through channels is controlled by the application of a voltage to the gate electrode based on electrostatic Aharanov-Bohm effect. The device uses the coherency characteristics of the superconducting material, thus high speed switching operation can be achieved.