Patents by Inventor Kenji GOTSUBO

Kenji GOTSUBO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230015306
    Abstract: A non-transitory computer-readable storage medium storing a work planning program that causes at least one computer to execute a process, the process includes dividing a plurality of objects into a plurality of groups according to a type of a constraint condition set to each of the plurality of objects, the constraint condition being related to an order in which the plurality of objects are worked in a work line; and acquiring an order of the plurality of objects in the work line so that the constraint condition is satisfied in each of the plurality of groups.
    Type: Application
    Filed: March 10, 2022
    Publication date: January 19, 2023
    Applicant: FUJITSU LIMITED
    Inventors: Toshiyuki SHIBUYA, Daichi Shimada, Kenji GOTSUBO, Takafumi ANRAKU
  • Patent number: 10176035
    Abstract: A system for migrating a virtual machine includes: a first device; and a second device. The first device notifies the second device of failure information indicating that data transported to the second device includes an error originated from the first device, when the error is detected from a storage area in the first device. The second device writes a second identifier, whose value is different from that of a first identifier, into a memory of the second device while associating the second identifier with a second address, the second address being to serve as a copy destination of data indicated by the failure information, wherein the first identifier indicates that data in the second address includes an error originated from the second device, and the second identifier serves as an identifier indicating that data in the second address includes an error originated from the first device.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: January 8, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Hayato Koike, Hiroshi Kondou, Takafumi Anraku, Kenji Gotsubo
  • Publication number: 20170031745
    Abstract: A system for migrating a virtual machine includes: a first device; and a second device. The first device notifies the second device of failure information indicating that data transported to the second device includes an error originated from the first device, when the error is detected from a storage area in the first device. The second device writes a second identifier, whose value is different from that of a first identifier, into a memory of the second device while associating the second identifier with a second address, the second address being to serve as a copy destination of data indicated by the failure information, wherein the first identifier indicates that data in the second address includes an error originated from the second device, and the second identifier serves as an identifier indicating that data in the second address includes an error originated from the first device.
    Type: Application
    Filed: July 22, 2016
    Publication date: February 2, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Hayato Koike, Hiroshi Kondou, Takafumi ANRAKU, Kenji GOTSUBO
  • Patent number: 9535492
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to: determine whether or not a difference between a total of power consumption values of physical or virtual computers and a preset upper-limit value satisfies a certain condition; select, in ascending order of priorities stored in a first storage and set based on details of processing executed by the computers, any of the computers as a target whose power consumption is to be reduced, when the difference satisfies the certain condition; and switch the computer selected to a state in which the power consumption is reduced.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: January 3, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Fumiaki Yamana, Hiroshi Kondou, Kenji Gotsubo
  • Patent number: 9436488
    Abstract: An information processing apparatus that mounts a first and second system boards SB#0 and SB#1 includes a virtualization control unit that operates a virtual machine for virtualizing hardware resources. The SB#0 includes a memory that stores a command line, resource information, and management information. The SB#1 includes a memory that stores a command line and resource information. The command line is executed by the virtualization control unit. The resource information is data used by each system board from among data used when the virtualization control unit operates. The management information is data commonly shared by each system board and used by the virtualization control unit. A command line and resource information are used when the virtualization control unit operates and information on the hardware resources included in the corresponding SB. Each SB executes the command line and refers to the information stored in the memory in SBs.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: September 6, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Masahiro Doteguchi, Kenji Okano, Takehiro Okabe, Nikolay Polyakov, Reiji Watanabe, Kenji Gotsubo
  • Patent number: 9146818
    Abstract: A memory degeneracy method is executed by an information processing device in which a plurality of virtual machines operate. The memory degeneracy method includes storing, in a storage unit, a physical address or address information of a memory module, which corresponds to a virtual physical address relevant to a fault, in response to detecting the fault in a memory area assigned to a first virtual machine; changing an association relationship between virtual physical addresses and physical addresses relevant to the first virtual machine, before an operating system operating on the first virtual machine is rebooted in response to detecting the fault; and removing, from a usage target of the operating system, the virtual physical address corresponding to the physical address or the address information of the memory module stored in the storage unit.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 29, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Kenji Gotsubo, Atsushi Kobayashi
  • Patent number: 9015517
    Abstract: In an information processing apparatus, a control unit includes a first clock device for providing the time of day. A physical domain includes a second clock device, and implements a logical domain that functions as a virtual information processing apparatus. The control unit controls a first time-of-day difference between the time of day of the first clock device and that of the second clock device. The physical domain controls a second time-of-day difference between the time of day of the second clock device and that of the logical domain. In the information processing apparatus, the time of day on the logical domain is controlled based on the first and second time-of-day differences.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: April 21, 2015
    Assignee: Fujitsu Limited
    Inventors: Kenji Okano, Kenji Gotsubo, Tadashi Yamada, Hiromi Fukumura
  • Patent number: 8990630
    Abstract: A server having a plurality of system boards, comprising: a panic processing unit configured to stop (panic) the server; a system board information storage unit configured to store information to identify a system board having a memory used by a kernel; a system board detaching processing unit configured to detach the system board having the memory used by the kernel before server stoppage; and a reboot processing unit configured to reboot the server using system boards other than the separated system board among the plurality of system boards, after detaching the system board having the memory used by the kernel.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: March 24, 2015
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kondo, Ryo Tabei, Kenji Gotsubo
  • Publication number: 20140281694
    Abstract: A memory degeneracy method is executed by an information processing device in which a plurality of virtual machines operate. The memory degeneracy method includes storing, in a storage unit, a physical address or address information of a memory module, which corresponds to a virtual physical address relevant to a fault, in response to detecting the fault in a memory area assigned to a first virtual machine; changing an association relationship between virtual physical addresses and physical addresses relevant to the first virtual machine, before an operating system operating on the first virtual machine is rebooted in response to detecting the fault; and removing, from a usage target of the operating system, the virtual physical address corresponding to the physical address or the address information of the memory module stored in the storage unit.
    Type: Application
    Filed: May 27, 2014
    Publication date: September 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kenji GOTSUBO, Atsushi Kobayashi
  • Publication number: 20140181359
    Abstract: An information processing apparatus running multiple virtual machines includes a correspondence information storage section configured to store correspondence information between a virtual address and a physical address, the correspondence information being used by a second virtual machine when executing a procedure relevant to a first virtual machine; a correspondence information processing section configured to invalidate the correspondence information in response to an occurrence of a panic in the first virtual machine; and a preservation section configured to preserve content of a memory area allocated to the second virtual machine into a storage device.
    Type: Application
    Filed: February 26, 2014
    Publication date: June 26, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Xiaoyang ZHANG, Fumiaki YAMANA, Kenji GOTSUBO, Hiroyuki IZUI
  • Publication number: 20130268791
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to: determine whether or not a difference between a total of power consumption values of physical or virtual computers and a preset upper-limit value satisfies a certain condition; select, in ascending order of priorities stored in a first storage and set based on details of processing executed by the computers, any of the computers as a target whose power consumption is to be reduced, when the difference satisfies the certain condition; and switch the computer selected to a state in which the power consumption is reduced.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 10, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Fumiaki YAMANA, Hiroshi KONDOU, Kenji GOTSUBO
  • Publication number: 20130263115
    Abstract: An information processing apparatus that mounts a first and second system boards SB#0 and SB#1 includes a virtualization control unit that operates a virtual machine for virtualizing hardware resources. The SB#0 includes a memory that stores a command line, resource information, and management information. The SB#1 includes a memory that stores a command line and resource information. The command line is executed by the virtualization control unit. The resource information is data used by each system board from among data used when the virtualization control unit operates. The management information is data commonly shared by each system board and used by the virtualization control unit. A command line and resource information are used when the virtualization control unit operates and information on the hardware resources included in the corresponding SB. Each SB executes the command line and refers to the information stored in the memory in SBs.
    Type: Application
    Filed: March 27, 2012
    Publication date: October 3, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Masahiro Doteguchi, Kenji Okano, Takehiro Okabe, Nikolay Polyakov, Reiji Watanabe, Kenji Gotsubo
  • Publication number: 20120233487
    Abstract: In an information processing apparatus, a control unit includes a first clock device for providing the time of day. A physical domain includes a second clock device, and implements a logical domain that functions as a virtual information processing apparatus. The control unit controls a first time-of-day difference between the time of day of the first clock device and that of the second clock device. The physical domain controls a second time-of-day difference between the time of day of the second clock device and that of the logical domain. In the information processing apparatus, the time of day on the logical domain is controlled based on the first and second time-of-day differences.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kenji OKANO, Kenji Gotsubo, Tadashi Yamada, Hiromi Fukumura
  • Publication number: 20120102358
    Abstract: A server having a plurality of system boards, comprising: a panic processing unit configured to stop (panic) the server; a system board information storage unit configured to store information to identify a system board having a memory used by a kernel; a system board detaching processing unit configured to detach the system board having the memory used by the kernel before server stoppage; and a reboot processing unit configured to reboot the server using system boards other than the separated system board among the plurality of system boards, after detaching the system board having the memory used by the kernel.
    Type: Application
    Filed: January 3, 2012
    Publication date: April 26, 2012
    Applicant: Fujitsu Limited
    Inventors: Hiroshi KONDO, Ryo TABEI, Kenji GOTSUBO