Patents by Inventor Kenji Miyajima

Kenji Miyajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6365979
    Abstract: In this semiconductor device, immediate below a mold line M in a surface where an inner lead of a wiring substrate composed of a BT resin impregnated glass cloth or the like is formed, a second solder resist layer is stacked on a first solder resist layer to form a protrusion of a predetermined width. Then, on a predetermined position of the wiring substrate, a semiconductor element is assembled by wire bonding and an assembled part thereof is molded by a resin layer. Further, on the other surface of the wiring substrate, bumps are formed. Such a semiconductor device is separated by use of a slit hole formed on the wiring substrate in advance in conformity with a mold line M. In this structure, in a step of molding, since a resin is not forced outside of a pushing face of a metal mold to form a burr or the like, a thin and small resin molded semiconductor device of excellent appearance and characteristic can be obtained.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: April 2, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenji Miyajima
  • Patent number: 5731231
    Abstract: A semiconductor apparatus has a wiring board having a wiring pattern and a plurality of connection electrodes formed on a surface thereof with the connection electrodes being electrically connected to the wiring pattern. A semiconductor device is mounted on a main surface of the wiring board and electrically connected to the wiring pattern. A resin-sealed structure is formed by a transfer mold for coating the main surface of the wiring board and the semiconductor device and having sides with a predetermined taper angle after coating. Those side edge portions of the resin-sealed structure which contact the main surface of the wiring board are in contact with edge portions of respective sides of the wiring board.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: March 24, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenji Miyajima