Patents by Inventor Kenji Mukai

Kenji Mukai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230134242
    Abstract: A differential amplifying apparatus includes an input matching circuit serving as an input balun to which a signal inputted to an input terminal is input, an output matching circuit serving as an output balun that outputs a signal to an output terminal, first and second amplifiers provided in parallel between the input balun and the output balun and configured to output a differential signal, a diode provided between a reference potential and a path between the input balun and the first amplifier, a second diode provided between a reference potential and a path between the input balun and the second amplifier, and a bias circuit that applies a bias to the first diode and the second diode, in which a cathode of the first diode and a cathode of the second diode are connected to the reference potential side.
    Type: Application
    Filed: November 1, 2022
    Publication date: May 4, 2023
    Inventors: Masafumi KAZUNO, Kenji MUKAI
  • Patent number: 11588442
    Abstract: A power amplifier circuit includes a first power supply terminal electrically connected to a first power amplifier; a second power supply terminal electrically connected to a second power amplifier subsequent to the first power amplifier; a first external power supply line configured to electrically connect a power supply circuit configured to output a power supply potential corresponding to an amplitude level of a high-frequency input signal and the first power supply terminal; and a second external power supply line configured to electrically connect the power supply circuit and the second power supply terminal. An inductance value of the first external power supply line is higher than an inductance value of the second external power supply line.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: February 21, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Satoshi Arayashiki, Kenji Mukai
  • Patent number: 11444585
    Abstract: A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: September 13, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Kenji Mukai
  • Patent number: 11444582
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: September 13, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Kenji Mukai, Fumio Harima
  • Patent number: 11195807
    Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 7, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tomoyuki Asada, Yoichi Nogami, Kenichi Horiguchi, Shigeo Yamabe, Satoshi Miho, Kenji Mukai
  • Publication number: 20210152132
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: January 27, 2021
    Publication date: May 20, 2021
    Inventors: Yuri HONDA, Kenji MUKAI, Fumio HARIMA
  • Publication number: 20210135630
    Abstract: A power amplifier circuit includes a first power supply terminal electrically connected to a first power amplifier; a second power supply terminal electrically connected to a second power amplifier subsequent to the first power amplifier; a first external power supply line configured to electrically connect a power supply circuit configured to output a power supply potential corresponding to an amplitude level of a high-frequency input signal and the first power supply terminal; and a second external power supply line configured to electrically connect the power supply circuit and the second power supply terminal. An inductance value of the first external power supply line is higher than an inductance value of the second external power supply line.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 6, 2021
    Inventors: Satoshi TANAKA, Satoshi ARAYASHIKI, Kenji MUKAI
  • Patent number: 10924067
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: February 16, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Kenji Mukai, Fumio Harima
  • Publication number: 20200227363
    Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.
    Type: Application
    Filed: September 28, 2017
    Publication date: July 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomoyuki ASADA, Yoichi NOGAMI, Kenichi HORIGUCHI, Shigeo YAMABE, Satoshi MIHO, Kenji MUKAI
  • Patent number: 10715093
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Fuminori Morisawa, Kenji Mukai, Yuri Honda
  • Publication number: 20200052658
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: July 24, 2019
    Publication date: February 13, 2020
    Inventors: Yuri HONDA, Kenji MUKAI, Fumio HARIMA
  • Publication number: 20190356281
    Abstract: A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.
    Type: Application
    Filed: May 9, 2019
    Publication date: November 21, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Kenji MUKAI
  • Publication number: 20190280658
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Application
    Filed: February 25, 2019
    Publication date: September 12, 2019
    Inventors: Fuminori MORISAWA, Kenji MUKAI, Yuri HONDA
  • Patent number: 9407216
    Abstract: A comparator 13 that detects the difference between a high frequency signal detected by a detector 12 and a feedback signal A output from a comparator 11; a comparator 14 that detects the difference between the difference detected by the comparator 13 and a feedback signal B output from an adder 18; and a loop filter 15 that passes only a prescribed low frequency band of the output signal of the comparator 14 are provided, in which an amplitude sensitivity adjuster 16 adjusts the amplitude sensitivity of a variable gain amplifier 3 in accordance with the rate of change of the signal passing through the loop filter 15, thereby controlling the gain of the variable gain amplifier 3.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: August 2, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tatsuo Kohama, Yutaro Yamaguchi, Naoko Nitta, Kenji Mukai, Hiroshi Otsuka, Kenichi Horiguchi, Morishige Hieda, Koji Yamanaka, Satoshi Miho
  • Publication number: 20150342696
    Abstract: An illumination apparatus includes a light emitting unit configured to emit illumination light including a first light having a first peak wavelength of a first peak in a first wavelength range of 495 nm to 510 nm and a second light having a second peak wavelength of a second peak in a second wavelength range of 610 nm to 680 nm. In the illumination apparatus, an intensity of the second light at the second peak wavelength is higher than an intensity of the first light at the first peak wavelength.
    Type: Application
    Filed: May 21, 2015
    Publication date: December 3, 2015
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tohru HIMENO, Kenji MUKAI, Yoko MATSUBAYASHI, Naoko TAKEI
  • Publication number: 20150340997
    Abstract: A plurality of source-grounded transistors (3) are connected in parallel with each other, and a plurality of gate-grounded transistors (4) are connected in parallel with each other. Sources (4s) of the plurality of gate-grounded transistors (4) are connected to drains (3d) of the plurality of source-grounded transistors (3) respectively. Ground pads (5) are connected to sources (3s) of the plurality of source-grounded transistors (3). A plurality of grounding capacitances (6) are connected between gates (4g) of the plurality of gate-grounded transistors (4) and the ground pads (5). The plurality of source-grounded transistors (3) and the plurality of grounding capacitances (6) are alternately arranged between the ground pads (5) and the plurality of gate-grounded transistors (4).
    Type: Application
    Filed: November 9, 2012
    Publication date: November 26, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Katsuya KATO, Miyo MIYASHITA, Toshihide OKA, Kenichi HORIGUCHI, Kazutomi MORI, Kenji MUKAI, Takanobu FUJIWARA
  • Publication number: 20150207476
    Abstract: A comparator 13 that detects the difference between a high frequency signal detected by a detector 12 and a feedback signal A output from a comparator 11; a comparator 14 that detects the difference between the difference detected by the comparator 13 and a feedback signal B output from an adder 18; and a loop filter 15 that passes only a prescribed low frequency band of the output signal of the comparator 14 are provided, in which an amplitude sensitivity adjuster 16 adjusts the amplitude sensitivity of a variable gain amplifier 3 in accordance with the rate of change of the signal passing through the loop filter 15, thereby controlling the gain of the variable gain amplifier 3.
    Type: Application
    Filed: September 21, 2012
    Publication date: July 23, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsuo Kohama, Yutaro Yamaguchi, Naoko Nitta, Kenji Mukai, Hiroshi Otsuka, Kenichi Horiguchi, Morishige Hieda, Koji Yamanaka, Satoshi Miho
  • Publication number: 20150048887
    Abstract: An amplifier circuit is configured in such a manner that the withstand voltage between the terminals of a FET 2 (withstand voltage B) is higher than the withstand voltage between the terminals of a FET 1 (withstand voltage A), and that the gate width of the FET 1 (Wg1) is narrower than the gate width of the FET 2 (Wg2). This makes it possible to increase the gain while maintaining high output power. The narrow gate width of the FET 1 (Wg1) connected to an input terminal 3 enables reducing the size of the cascode amplifier.
    Type: Application
    Filed: March 12, 2013
    Publication date: February 19, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Naoko Nitta, Katsuya Kato, Kenji Mukai, Kenichi Horiguchi, Morishige Hieda, Kazutomi Mori, Kazuya Yamamoto
  • Publication number: 20140232467
    Abstract: A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1, and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7. The driver-stage amplifier 3 is fabricated on a silicon substrate 11, while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.
    Type: Application
    Filed: August 24, 2012
    Publication date: August 21, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji Mukai, Kenichi Horiguchi, Morishige Hieda, Katsuya Kato, Yoshihito Hirano, Kazuya Yamamoto, Hiroyuki Joba, Teruyuki Shimura
  • Publication number: 20140103996
    Abstract: A front-end amplifier has an impedance detector that detects an impedance seen looking into an antenna side from a power amplifier from a radio-frequency signal output from the power amplifier and a radio-frequency signal reflected from the antenna, in which a control circuit decides on whether the impedance detected by the impedance detector belongs to a specific region or not, and controls, if the impedance belongs to the specific region, at least one of the bias condition of the power amplifier and the impedance of a variable-matching circuit.
    Type: Application
    Filed: August 24, 2012
    Publication date: April 17, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi Horiguchi, Katsuya Kato, Kenji Mukai, Naoko Matsunaga, Morishige Hieda, Kazutomi Mori