Patents by Inventor Kenji Noma

Kenji Noma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160276578
    Abstract: According to one embodiment, a device including a magnetoresistive element is disclosed. The device includes a substrate, a second layer provided on the substrate and including a magnetic material, and a third layer provided on a top or bottom of the second layer and including a material having a negative coefficient of thermal expansion.
    Type: Application
    Filed: June 4, 2015
    Publication date: September 22, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KOBAYASHI, Kenji NOMA, Takeshi FUJIMORI
  • Patent number: 9312475
    Abstract: According to one embodiment, a magnetoresistive element includes first and second magnetic layers, a first nonmagnetic layer, a conductive layer. The first and second magnetic layers have axes of easy magnetization perpendicular to a film plane. The first and second magnetic layers have variable and invariable magnetization directions, respectively. The first nonmagnetic layer is between the first and second magnetic layers. The conductive layer is on a surface of the first magnetic layer opposite to a surface on which the first nonmagnetic layer is formed. The first magnetic layer has a structure obtained by alternately laminating magnetic and nonmagnetic materials. The nonmagnetic material includes at least one of Ta, W, Nb, Mo, Zr, Hf. The magnetic material includes Co and Fe. One of the magnetic materials contacts the first nonmagnetic layer. One of the nonmagnetic materials contacts the conductive layer.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: April 12, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihiko Nagase, Daisuke Watanabe, Koji Ueda, Katsuya Nishiyama, Eiji Kitagawa, Kenji Noma, Tadashi Kai
  • Patent number: 9305576
    Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer as a reference layer, a second magnetic layer as a storage layer, a nonmagnetic insulating layer between the first and second magnetic layers, and an antiferromagnetic conductive layer which is adjacent to a side opposite to the nonmagnetic insulating layer side of the second magnetic layer in a vertical direction in which the first and second magnetic layers are stacked. The second magnetic layer includes an area which is magnetically coupled with the antiferromagnetic conductive layer and which has a magnetization direction parallel with a magnetization direction of the second magnetic layer.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenji Noma
  • Publication number: 20160072052
    Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer having an invariable magnetization, a second magnetic layer having a variable magnetization, and an insulating layer between the first and second magnetic layers. The insulating layer includes at least one of a nickel oxide, an iron oxide, a cobalt oxide, a manganese oxide, LaMnO3 and ZnFe2O4.
    Type: Application
    Filed: December 5, 2014
    Publication date: March 10, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenji NOMA
  • Publication number: 20160072049
    Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer as a reference layer, a second magnetic layer as a storage layer, a nonmagnetic insulating layer between the first and second magnetic layers, and an antiferromagnetic conductive layer which is adjacent to a side opposite to the nonmagnetic insulating layer side of the second magnetic layer in a vertical direction in which the first and second magnetic layers are stacked. The second magnetic layer includes an area which is magnetically coupled with the antiferromagnetic conductive layer and which has a magnetization direction parallel with a magnetization direction of the second magnetic layer.
    Type: Application
    Filed: March 4, 2015
    Publication date: March 10, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenji NOMA
  • Publication number: 20160043305
    Abstract: According to one embodiment, a magnetoresistive effect element includes: a first magnetic layer; a second magnetic layer; a non-magnetic film between the first magnetic layer and the second magnetic layer; a first layer on an opposite side of a side of the non-magnetic layer of the first magnetic layer, the first layer including magnesium oxide as a principal component; and a second layer between the first film and the first magnetic layer, the second layer including a material different from a material of the first layer.
    Type: Application
    Filed: March 5, 2015
    Publication date: February 11, 2016
    Inventors: Takao Ochiai, Eiji Kitagawa, Kenji Noma
  • Publication number: 20160013398
    Abstract: According to one embodiment, a magnetoresistive element includes a recording layer having a variable magnetization direction, a reference layer having an invariable magnetization direction, an intermediate layer provided between the recording layer and the reference layer, and a first buffer layer provided on a surface of the recording layer, which is opposite to a surface of the recording layer where the intermediate layer is provided. The recording layer comprises a first magnetic layer which is provided in a side of the intermediate layer and contains CoFe as a main component, and a second magnetic layer which is provided in a side of the first buffer layer and contains CoFe as a main component, a concentration of Fe in the first magnetic layer being higher than a concentration of Fe in the second magnetic layer. The first buffer layer comprises a nitrogen compound.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 14, 2016
    Inventors: Eiji Kitagawa, Tadaomi Daibou, Tadashi Kai, Toshihiko Nagase, Kenji Noma, Hiroaki Yoda
  • Patent number: 9231195
    Abstract: According to one embodiment, a magnetic memory comprises an electrode, a memory layer which is formed on the electrode and has magnetic anisotropy perpendicular to a film plane, and in which a magnetization direction is variable, a tunnel barrier layer formed on the memory layer, and a reference layer which is formed on the tunnel barrier layer and has magnetic anisotropy perpendicular to the film plane, and in which a magnetization direction is invariable. The memory layer has a positive magnetostriction constant on a side of the electrode, and a negative magnetostriction constant on a side of the tunnel barrier layer.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: January 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinya Kobayashi, Kenji Noma
  • Patent number: 9190453
    Abstract: According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: November 17, 2015
    Inventors: Takashi Nakazawa, Yoshiaki Asao, Takeshi Kajiyama, Kenji Noma
  • Patent number: 9190361
    Abstract: According to one embodiment, a semiconductor device includes a MRAM chip including a semiconductor substrate and a memory cell array area includes magnetoresistive elements which are provided on the semiconductor substrate, and a magnetic shield layer separated from the MRAM chip, surrounding the memory cell array area in a circumferential direction of the MRAM chip, and having a closed magnetic path.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: November 17, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenji Noma
  • Patent number: 9165585
    Abstract: According to one embodiment, a magnetoresistive element includes a recording layer having a variable magnetization direction, a reference layer having an invariable magnetization direction, an intermediate layer provided between the recording layer and the reference layer, and a first buffer layer provided on a surface of the recording layer, which is opposite to a surface of the recording layer where the intermediate layer is provided. The recording layer comprises a first magnetic layer which is provided in a side of the intermediate layer and contains CoFe as a main component, and a second magnetic layer which is provided in a side of the first buffer layer and contains CoFe as a main component, a concentration of Fe in the first magnetic layer being higher than a concentration of Fe in the second magnetic layer. The first buffer layer comprises a nitrogen compound.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Kitagawa, Tadaomi Daibou, Tadashi Kai, Toshihiko Nagase, Kenji Noma, Hiroaki Yoda
  • Publication number: 20150263265
    Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic element, a protective insulating film covering the stacked structure, and an interface layer provided at an interface between the stacked structure and the protective insulating film. The interface layer contains a predetermined element which is not contained in the magnetic element or the protective insulating film.
    Type: Application
    Filed: September 5, 2014
    Publication date: September 17, 2015
    Inventors: Masatoshi YOSHIKAWA, Hiroaki YODA, Shuichi TSUBATA, Kenji NOMA, Tatsuya KISHI, Satoshi SETO, Kazuhiro TOMIOKA
  • Publication number: 20150263274
    Abstract: According to one embodiment, a magnetic field applying apparatus includes a stage on which a semiconductor wafer having a major surface provided with a magnetoresistive effect element is placed, and an external magnetic field supplying unit configured to supply an external magnetic field to the semiconductor wafer planed on the stage. The external magnetic field supplying unit is provided on a reverse surface side or a lateral surface side of the semiconductor wafer placed on the stage.
    Type: Application
    Filed: September 9, 2014
    Publication date: September 17, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio MIYATA, Kenji NOMA, Shinya KOBAYASHI, Yosuke KOBAYASHI, Masashi KAWAMURA, Nobuyuki OGATA
  • Publication number: 20150228695
    Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a memory cell array area on the semiconductor substrate, the memory cell array area including magnetoresistive elements, each of the magnetoresistive elements having a reference layer with an invariable magnetization, a storage layer with a variable magnetization, and a tunnel barrier layer therebetween, a magnetic field generating area which generates a first magnetic field cancelling a second magnetic field applying from the reference layer to the storage layer, and which is separated from the magnetoresistive elements, and a closed magnetic path area functioning as a closed magnetic path of the first magnetic field, and surrounding the memory cell array area and the magnetic field generating area.
    Type: Application
    Filed: April 22, 2015
    Publication date: August 13, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinya KOBAYASHI, Kenji NOMA, Hisato OYAMATSU
  • Publication number: 20150155332
    Abstract: According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.
    Type: Application
    Filed: February 13, 2015
    Publication date: June 4, 2015
    Inventors: Takashi NAKAZAWA, Yoshiaki ASAO, Takeshi KAJIYAMA, Kenji NOMA
  • Patent number: 9041130
    Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a memory cell array area on the semiconductor substrate, the memory cell array area including magnetoresistive elements, each of the magnetoresistive elements having a reference layer with an invariable magnetization, a storage layer with a variable magnetization, and a tunnel barrier layer therebetween, a magnetic field generating area which generates a first magnetic field cancelling a second magnetic field applying from the reference layer to the storage layer, and which is separated from the magnetoresistive elements, and a closed magnetic path area functioning as a closed magnetic path of the first magnetic field, and surrounding the memory cell array area and the magnetic field generating area.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: May 26, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinya Kobayashi, Kenji Noma, Hisato Oyamatsu
  • Patent number: 8981446
    Abstract: According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: March 17, 2015
    Inventors: Takashi Nakazawa, Yoshiaki Asao, Takeshi Kajiyama, Kenji Noma
  • Patent number: 8981441
    Abstract: According to one embodiment, a manufacturing method of a magnetic memory includes forming a magnetoresistive element in a cell array section on a semiconductor substrate, forming a dummy element in a peripheral circuit section on the semiconductor substrate, the dummy element having the same stacked structure as the magnetoresistive element and being arranged at the same level as the magnetoresistive element, collectively flattening the magnetoresistive element and the dummy element, applying a laser beam to the dummy element to form the dummy element into a non-magnetic body, and forming an upper electrode on the flattened magnetoresistive element.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Noma, Hiroshi Watanabe, Shinya Kobayashi
  • Publication number: 20150069545
    Abstract: According to one embodiment, a semiconductor device includes a MRAM chip including a semiconductor substrate and a memory cell array area includes magnetoresistive elements which are provided on the semiconductor substrate, and a magnetic shield layer separated from the MRAM chip, surrounding the memory cell array area in a circumferential direction of the MRAM chip, and having a closed magnetic path.
    Type: Application
    Filed: January 28, 2014
    Publication date: March 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenji NOMA
  • Publication number: 20150069546
    Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a memory cell array area on the semiconductor substrate, the memory cell array area including magnetoresistive elements, each of the magnetoresistive elements having a reference layer with an invariable magnetization, a storage layer with a variable magnetization, and a tunnel barrier layer therebetween, a magnetic field generating area which generates a first magnetic field cancelling a second magnetic field applying from the reference layer to the storage layer, and which is separated from the magnetoresistive elements, and a closed magnetic path area functioning as a closed magnetic path of the first magnetic field, and surrounding the memory cell array area and the magnetic field generating area.
    Type: Application
    Filed: February 11, 2014
    Publication date: March 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinya KOBAYASHI, Kenji NOMA, Hisato OYAMATSU