Patents by Inventor Kenji Sera
Kenji Sera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230386246Abstract: An ultrasonic sensor device includes a plurality of pixels each including an ultrasonic transducer, and a control circuit configured to control the plurality of pixels. Each of the plurality of pixels is configured to hold a signal received by the ultrasonic transducer therein and send the signal to the control circuit as a response signal. The control circuit is configured to acquire an excitation response signal, which is a response signal sent from a pixel after the ultrasonic transducer therein is excited, acquire a non-excitation response signal, which is a response signal sent from a pixel when the ultrasonic transducer therein is not excited, and correct the excitation response signal based on the non-excitation response signal.Type: ApplicationFiled: May 23, 2023Publication date: November 30, 2023Inventors: Hiroshi HAGA, Shin TAKEUCHI, Kenji SERA, Kenichi HAYASHI, Feng LU, Haochi YU, QiJun YAO
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Publication number: 20230241646Abstract: A method of manufacturing a piezoelectric element array board includes fabricating a plurality of piezoelectric element control circuits including one or more thin-film transistors on a substrate, fabricating a plurality of piezoelectric elements on the substrate, and poling a piezoelectric material by applying an electric field to a piezoelectric material layer of the plurality of piezoelectric elements while maintaining the one or more thin-film transistors in a state of generating higher leakage current, after fabricating the plurality of piezoelectric elements and the plurality of piezoelectric element control circuits.Type: ApplicationFiled: January 20, 2023Publication date: August 3, 2023Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.Inventors: Kenji SERA, Kenichi HAYASHI, Hiroshi HAGA, Shin TAKEUCHI
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Publication number: 20230178655Abstract: An oxide semiconductor thin-film transistor device includes a gate electrode region, an oxide semiconductor region, a first source/drain electrode region, and a second source/drain electrode region. The oxide semiconductor region has a concentration distribution of an element capable of increasing resistance of an oxide semiconductor. The concentration distribution shows a first concentration at the centroid of a channel region overlapping the gate electrode region in a planar view. The concentration distribution shows a concentration higher than the first concentration in a vicinity of at least a part of a boundary defining an outer end of the channel region.Type: ApplicationFiled: December 5, 2022Publication date: June 8, 2023Applicant: Xiamen Tianma Display Technology Co., Ltd.Inventors: Jun TANAKA, Kazushige TAKECHI, Kenji SERA
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Publication number: 20220302313Abstract: A thin-film transistor substrate includes an insulating substrate, a conductor layer including a top-gate electrode part of an oxide semiconductor thin-film transistor, an oxide semiconductor layer located lower than the top-gate electrode part and including a channel region of the oxide semiconductor thin-film transistor, and an upper insulating layer located between the conductor layer and the oxide semiconductor layer. The oxide semiconductor layer includes low-resistive regions lower in resistance than the channel region. The low-resistive regions sandwich the channel region in an in-plane direction of the insulating substrate and contain impurities to cause resistance reduction of the low-resistive regions. A concentration profile in a layering direction of the impurities to cause resistance reduction of the low resistive regions has one or more peaks. The one or more peaks are located outside the oxide semiconductor layer.Type: ApplicationFiled: March 21, 2022Publication date: September 22, 2022Inventors: Kazushige TAKECHI, Kenji SERA, Jun TANAKA, Shui HE, FeiPeng LIN
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Patent number: 11380798Abstract: A thin-film device includes a polysilicon element and an oxide semiconductor element. The polysilicon element includes a first part made of low-resistive polysilicon. The oxide semiconductor element includes a second part made of low-resistive oxide semiconductor. The first part and the second part are disposed to overlap each other and connected.Type: GrantFiled: June 12, 2020Date of Patent: July 5, 2022Assignees: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD., TIANMA JAPAN, LTD.Inventors: Kazushige Takechi, Jun Tanaka, Kenji Sera, Yong Yuan
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Publication number: 20210134224Abstract: A display panel includes a substrate and a plurality of pixel driving circuits disposed on the substrate, and the plurality of pixel driving circuits include a storage capacitor and transistors. The transistors include transistors of a first type and a second type. The transistor of the first type is a composite transistor and includes a first sub-transistor and a second sub-transistor that are connected in series. The first sub-transistor is a low-temperature polysilicon transistor, and the second sub-transistor is an oxide transistor. The transistor of the first type includes a composite active layer, a composite gate electrode, a composite source electrode, and a composite drain electrode. The composite source electrode or the composite drain electrode of the transistor of the first type is electrically connected to the storage capacitor, or the transistor of the first type is in an off state during a light-emitting phase.Type: ApplicationFiled: December 31, 2019Publication date: May 6, 2021Inventors: Shui HE, Kenji SERA, Shuxian YANG, Ming YANG
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Patent number: 10984725Abstract: A display panel includes a substrate and a plurality of pixel driving circuits disposed on the substrate, and the plurality of pixel driving circuits include a storage capacitor and transistors. The transistors include transistors of a first type and a second type. The transistor of the first type is a composite transistor and includes a first sub-transistor and a second sub-transistor that are connected in series. The first sub-transistor is a low-temperature polysilicon transistor, and the second sub-transistor is an oxide transistor. The transistor of the first type includes a composite active layer, a composite gate electrode, a composite source electrode, and a composite drain electrode. The composite source electrode or the composite drain electrode of the transistor of the first type is electrically connected to the storage capacitor, or the transistor of the first type is in an off state during a light-emitting phase.Type: GrantFiled: December 31, 2019Date of Patent: April 20, 2021Assignee: Xiamen Tianma Micro-Electronics Co., LtdInventors: Shui He, Kenji Sera, Shuxian Yang, Ming Yang
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Publication number: 20200395488Abstract: A thin-film device includes a polysilicon element and an oxide semiconductor element. The polysilicon element includes a first part made of low-resistive polysilicon. The oxide semiconductor element includes a second part made of low-resistive oxide semiconductor. The first part and the second part are disposed to overlap each other and connected.Type: ApplicationFiled: June 12, 2020Publication date: December 17, 2020Inventors: Kazushige TAKECHI, Jun TANAKA, Kenji SERA, Yong YUAN
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Patent number: 9095159Abstract: The invention provides a composition that enhances the proliferation activity of propionic acid bacteria in the rumen of ruminants to allow the propionic acid bacteria to sufficiently exhibit their metabolic function in the rumen for the prevention and treatment of rumen acidosis in ruminants. The invention also provides use of the composition. Viable propionic acid bacteria and a lactic acid bacteria culture are orally administered to a ruminant to dramatically (rapidly) promote the proliferation of the propionic acid bacteria in the ruminant rumen, and to thereby increase the volatile fatty acid concentration in the rumen for the prevention and/or treatment of rumen acidosis in the ruminant.Type: GrantFiled: December 22, 2010Date of Patent: August 4, 2015Assignees: MEIJI FEED Co., Ltd., Meiji Co., Ltd.Inventors: Kenji Sera, Katsunori Kimura, Michio Kanbe, Takenori Orihashi, Manami Yoshida, Yoshiaki Obara
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Publication number: 20140037605Abstract: [Objects] An object of the present invention is to provide an orally administrable agent for medical use for animals for preventing or treating coccidiosis which is highly safe with no side effects, an agent for a food or a drink for use in the preservation of health, a feed additive, and a feed comprising the same. Another object of the present invention is to provide a method for rearing animals (particularly, livestock and poultry) using the same and a method for controlling coccidiosis using the same. [Means for Resolution] By using a fermentation product of a lactic acid bacterium and/or a whey fermentation product of a propionic acid bacterium as an active ingredient, an agent for preventing or treating coccidiosis, an agent for use in the preservation of health, and a feed additive can be provided.Type: ApplicationFiled: October 10, 2013Publication date: February 6, 2014Applicants: MEIJI CO., LTD., MEIJI FEED CO., LTD.Inventors: Kenji SERA, Takanori MASHIKO, Shuji IKEGAMI, Takenori ORIHASHI, Michio KANBE
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Publication number: 20120276055Abstract: The invention provides a composition that enhances the proliferation activity of propionic acid bacteria in the rumen of ruminants to allow the propionic acid bacteria to sufficiently exhibit their metabolic function in the rumen for the prevention and treatment of rumen acidosis in ruminants. The invention also provides use of the composition. Viable propionic acid bacteria and a lactic acid bacteria culture are orally administered to a ruminant to dramatically (rapidly) promote the proliferation of the propionic acid bacteria in the ruminant rumen, and to thereby increase the volatile fatty acid concentration in the rumen for the prevention and/or treatment of rumen acidosis in the ruminant.Type: ApplicationFiled: December 22, 2010Publication date: November 1, 2012Applicants: Meiji Co., Ltd., MEIJI FEED Co., Ltd.Inventors: Kenji Sera, Katsunori Kimura, Michio Kanbe, Takenori Orihashi, Manami Yoshida, Yoshiaki Obara
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Publication number: 20110135628Abstract: [Objects] An object of the present invention is to provide an orally administrable agent for medical use for animals for preventing or treating coccidiosis which is highly safe with no side effects, an agent for a food or a drink for use in the preservation of health, a feed additive, and a feed comprising the same. Another object of the present invention is to provide a method for rearing animals (particularly, livestock and poultry) using the same and a method for controlling coccidiosis using the same. [Means for Resolution] By using a fermentation product of a lactic acid bacterium and/or a whey fermentation product of a propionic acid bacterium as an active ingredient, an agent for preventing or treating coccidiosis, an agent for use in the preservation of health, and a feed additive can be provided.Type: ApplicationFiled: August 28, 2009Publication date: June 9, 2011Inventors: Kenji Sera, Takanori Mashiko, Shuji Ikegami, Takenori Orihashi, Michio Kanbe
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Patent number: 7595533Abstract: When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film formed on a glass substrate, a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channel TFTs and a part of the p-channel TFTs. In one channel doping operation, a set of low-VT and high-VT p-channel TFTs and a set of low-VT and high-VT n-channel TFTs can be formed. This method is used for forming high-VT TFTs, which can reduce the off-current, in logics and switch circuits and for forming low-VT TFTs, which can enlarge the dynamic range, in analog circuits to improve the performance of a thin film semiconductor.Type: GrantFiled: April 25, 2007Date of Patent: September 29, 2009Assignee: NEC CorporationInventors: Kenji Sera, Hiroshi Tsuchi
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Patent number: 7388625Abstract: A TFT array substrate is provided with an auxiliary capacitance that has a plurality of lower electrodes disposed for each pixel in the row and column directions below a pixel TFT and connected to the drain area of the corresponding pixel TFT. The distances L1 and L2 between separation areas formed between the lower electrodes adjacent in the row direction and the channel areas of the two pixel TFTs that correspond to the lower electrodes are substantially equal to each other. The distances L3 and L4 between separation areas formed between the lower electrodes adjacent in the column direction and the channel areas of the two pixel TFTs that correspond to the lower electrodes are substantially equal to each other. Furthermore, an upper electrode is disposed above the separation areas.Type: GrantFiled: December 22, 2005Date of Patent: June 17, 2008Assignee: NEC CorporationInventors: Tadahiro Matsuzaki, Kenji Sera
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Patent number: 7294881Abstract: At least either above or below a memory transistor formed on an insulating substrate, a shielding layer which has an area larger than that of the semiconductor layer of the memory transistor and has either an electromagnetic wave shielding effect or a light shielding effect or both of these is provided, and by this shielding layer, electromagnetic waves or light is prevented from entering the semiconductor layer. Or, the regional area of at least one of the gate and the charge accumulation layer of the memory transistor is made larger than the semiconductor layer to prevent electromagnetic waves or light from entering the semiconductor layer by the gate or the charge accumulation layer.Type: GrantFiled: February 2, 2005Date of Patent: November 13, 2007Assignee: NEC CorporationInventors: Takahiro Korenari, Kenji Sera, Hiroshi Kanou
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Publication number: 20070194377Abstract: When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film formed on a glass substrate, a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channel TFTs and a part of the p-channel TFTs. In one channel doping operation, a set of low-VT and high-VT p-channel TFTs and a set of low-VT and high-VT n-channel TFTs can be formed. This method is used for forming high-VT TFTs, which can reduce the off-current, in logics and switch circuits and for forming low-VT TFTs, which can enlarge the dynamic range, in analog circuits to improve the performance of a thin film semiconductor.Type: ApplicationFiled: April 25, 2007Publication date: August 23, 2007Applicant: NEC CORPORATIONInventors: Kenji Sera, Hiroshi Tsuchi
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Patent number: 7224224Abstract: When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film formed on a glass substrate, a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channel TFTs and a part of the p-channel TFTs. In one channel doping operation, a set of low-VT and high-VT p-channel TFTs and a set of low-VT and high-VT n-channel TFTs can be formed. This method is used for forming high-VT TFTs, which can reduce the off-current, in logics and switch circuits and for forming low-VT TFTs, which can enlarge the dynamic range, in analog circuits to improve the performance of a thin film semiconductor.Type: GrantFiled: September 9, 2003Date of Patent: May 29, 2007Assignee: NEC CorporationInventors: Kenji Sera, Hiroshi Tsuchi
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Patent number: 7123314Abstract: A light shielding film capable of shielding against light entering an active layer of a TFT and electroconductive is formed on the lower layer side of the active layer. Electrical stress is applied by causing a current in an insulating film between source and drain electrodes and the light shielding film to introduce a trap level at a density at least about 5×1012/cm2 into a source region and a drain region in a surface portion of the active layer on the light shielding film side.Type: GrantFiled: June 21, 2004Date of Patent: October 17, 2006Assignee: NEC CorporationInventors: Naoki Matsunaga, Kenji Sera
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Patent number: 7105905Abstract: A thin film transistor is provided including an active layer, in which a source region and drain region are formed, a first light-shielding film shielding a light incident on the active layer, and a second light-shielding film between the active layer and the first shielding film. A carrier concentration of at least surface portion of the second light-shielding film which opposes the active layer is about 1017/cm3 or less.Type: GrantFiled: December 1, 2003Date of Patent: September 12, 2006Assignee: NEC CorporationInventors: Naoki Matsunaga, Kenji Sera
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Patent number: 7071040Abstract: A method of fabricating a thin film transistor including an electrically insulating substrate, a semiconductor layer formed on the substrate, and source and drain electrodes formed above source and drain regions formed in the semiconductor layer, the source and drain electrodes being composed of aluminum or aluminum alloy, the method including the steps of forming a gate electrode, implanting impurity ions into the semiconductor layer for forming the source and drain regions, forming an interlayer insulating film entirely over the substrate, forming contact holes throughout the interlayer insulating film such that the source and drain regions are exposed through the contact holes, forming an electrically conductive film composed of aluminum or aluminum alloy, in the contact holes for forming the source and drain electrodes, and thermally annealing the substrate at 275 to 350 degrees centigrade for 1.5 to 3 hours in inert atmosphere.Type: GrantFiled: August 13, 2003Date of Patent: July 4, 2006Assignee: NEC CorporationInventors: Naoki Matsunaga, Kenji Sera