Patents by Inventor Kenji Shino

Kenji Shino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060256101
    Abstract: A scanning circuit and an image display device in which the influence of losses in a signal path to scanning wiring and a scanning signal output circuit can be reduced. By considering matrix drive in which one row is driven at a time and two or more of the rows are not simultaneously driven, the 480 rows are divided into six modules and one feedback circuit is provided in correspondence with each module to perform feedback control of the output buffers corresponding to 80 rows. An output from a switch is amplified by an operational amplifier and is input as a compensation signal to all the output buffers by an output voltage compensation circuit. Compensation for a voltage drop is made by using the compensation signal for an increase in voltage such that the apparent voltage drop due to the output current is limited to a small value.
    Type: Application
    Filed: July 24, 2006
    Publication date: November 16, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Kenji Shino, Tadashi Aoki, Aoji Isono, Kazuhiko Murayama
  • Publication number: 20060250345
    Abstract: A scanning circuit having a plurality of output units each outputs an ON potential sequentially, comprises: a first output unit that changes an ON potential to an OFF potential during a first period; and a second output unit that changes the OFF potential to the ON potential during a second period, wherein at least part of the first period and at least part of the second period overlap.
    Type: Application
    Filed: April 19, 2006
    Publication date: November 9, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Kenji Shino, Yasukazu Noine
  • Patent number: 7126597
    Abstract: A scanning circuit and an image display device in which the influence of losses in a signal path to scanning wiring and a scanning signal output circuit can be reduced. By considering matrix drive in which one row is driven at a time and two or more of the rows are not simultaneously driven, the 480 rows are divided into six modules and one feedback circuit is provided in correspondence with each module to perform feedback control of the output buffers corresponding to 80 rows. An output from a switch is amplified by an operational amplifier and is input as a compensation signal to all the output buffers by an output voltage compensation circuit. Compensation for a voltage drop is made by using the compensation signal for an increase in voltage such that the apparent voltage drop due to the output current is limited to a small value.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: October 24, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenji Shino, Tadashi Aoki, Aoji Isono, Kazuhiko Murayama
  • Publication number: 20060227078
    Abstract: The present invention can provide a driving apparatus capable of compensating an influence of a voltage drop at low costs in a simple manner, which includes: a column driver circuit that generates at least one of modulation signals different in start reference time in one horizontal scanning period and the modulation signals obtained by using pulse width modulation and voltage amplitude modulation in combination; and a correction circuit that corrects a voltage of the row selection signal so as to suppress a voltage variation of the row selection signal, which is caused due to at least a resistance of an output stage of the row driver circuit and a current caused to flow into the resistance.
    Type: Application
    Filed: June 9, 2006
    Publication date: October 12, 2006
    Inventors: Kenji Shino, Tadashi Aoki, Aoji Isono, Kazuhiko Murayama, Yasuhiko Sano
  • Patent number: 7079123
    Abstract: The present invention can provide a driving apparatus capable of compensating an influence of a voltage drop at low costs in a simple manner, which includes: a column driver circuit that generates at least one of modulation signals different in start reference time in one horizontal scanning period and the modulation signals obtained by using pulse width modulation and voltage amplitude modulation in combination; and a correction circuit that corrects a voltage of the row selection signal so as to suppress a voltage variation of the row selection signal, which is caused due to at least a resistance of an output stage of the row driver circuit and a current caused to flow into the resistance.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: July 18, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenji Shino, Tadashi Aoki, Aoji Isono, Kazuhiko Murayama, Yasuhiko Sano
  • Publication number: 20060050030
    Abstract: The present invention discloses an invention about a drive waveform for driving an image display unit. In particular, the present invention discloses the structure of using as a drive waveform a drive waveform signal which is level controlled by a plural of discontinuous levels including a minimum level which is a level corresponding to luminance brightness gradation data which is not 0, at least one non-minimum level which is a level corresponding to larger luminance brightness gradation data, and an intermediate level between the above-described minimum level and the above-described non-minimum level, and is given pulse width control with discontinuous pulse width, and which has a portion, which is controlled with the above-described minimum level, in its trailing edge, and a portion, which is controlled with the above-described intermediate level just before the former portion, when it has the portion controlled by the above-described non-minimum level.
    Type: Application
    Filed: November 2, 2005
    Publication date: March 9, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tadashi Aoki, Kazunori Katakura, Aoji Isono, Kazuhiko Murayama, Kenji Shino
  • Patent number: 6995516
    Abstract: A drive waveform signal which is level controlled by discontinuous levels including a minimum level corresponding to luminance brightness gradation data which is not 0, at least one non-minimum level corresponding to larger luminance brightness gradation data, and an intermediate level between the minimum and non-minimum level. The signal, which is employed to drive an image display unit, is given pulse width control with discontinuous pulse width, and has a portion, controlled with the minimum level, in its trailing edge, and a portion, controlled with the intermediate level just before the former portion, when it has the portion controlled by the non-minimum level.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: February 7, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadashi Aoki, Kazunori Katakura, Aoji Isono, Kazuhiko Murayama, Kenji Shino
  • Publication number: 20060007211
    Abstract: An image display apparatus having a plurality of image forming devices. In an output circuit provided between constant voltage supplies and wiring for driving each of the image forming devices, MOSFETs are successively turned on from the one having a higher ON resistance at the time of switching to make a stepwise transition between outputs from the constant voltage supplies, and have steady potential, thereby limiting undesirable variation in signal potential at the time of switching.
    Type: Application
    Filed: May 13, 2005
    Publication date: January 12, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kazuhiko Murayama, Tadashi Aoki, Aoji Isono, Kenji Shino
  • Publication number: 20050285882
    Abstract: Reduction of a display period due to blank shift of a shift register is eliminated. To achieve this, a driving device of a display panel comprises a scanning driver of sequentially selecting scanning wirings by sequentially transferring a selection signal by using the shift register, and a controller of giving the selection signal to the shift register. The controller gives the shift data for scanning (n+1)-th field to the shift register while the shift register is transferring the shift data for scanning n-th field.
    Type: Application
    Filed: June 15, 2005
    Publication date: December 29, 2005
    Applicant: Canon Kabushiki Kaisha
    Inventor: Kenji Shino
  • Patent number: 6970162
    Abstract: An image display apparatus having a plurality of image forming devices. In an output circuit provided between constant voltage supplies and wiring for driving each of the image forming devices, MOSFETs are successively turned on from the one having a higher ON resistance at the time of switching to make a stepwise transition between outputs from the constant voltage supplies, and have steady potential, thereby limiting undesirable variation in signal potential at the time of switching.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: November 29, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiko Murayama, Tadashi Aoki, Aoji Isono, Kenji Shino
  • Patent number: 6946799
    Abstract: A drive circuit includes a drive transistor connected at a pair of its main electrodes respectively to a drive output terminal side and a reference voltage source VEE side, an operational amplifier for controlling an output voltage that is output from the drive transistor, a detection transistor for detecting a current that flows through the drive transistor, a first feedback loop for detecting an output voltage at the drive output terminal and feeding back the output voltage to the operational amplifier, and a second feedback loop for detecting an output current of the detection transistor and feeding back the output current to the operational amplifier. The drive transistor and the detection transistor form a mirror circuit.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: September 20, 2005
    Assignees: Canon Kabushiki Kaisha, Kabushiki Kaisha Toshiba
    Inventors: Kenji Shino, Yasukazu Noine
  • Patent number: 6882329
    Abstract: A drive signal generation circuit which performs gradation control on a load by a drive signal having a stepped waveform. In a case where the wave height value corresponding to input gradation data is Vm (2?m?n), the drive signal is caused to rise in such a manner that each output Vk (2?k?m) is produced one slot after the output V(k?1) to increase the wave height value V0 (reference potential) to Vm in a stepping manner. One slot corresponds to a unit time of the pulse width modulation. The drive signal is caused to fall in such a manner that each output V(k?1) (1?k?m?1) is produced one or two slots after the output Vk to reduce the wave height value from Vm to off level in a stepping manner. A delay circuit is used to delay signals slot by slot. A selection is made from delayed signals according to luminance data to determine a waveform. The circuit is also designed to enable the drive signal waveform rise position to be changed.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: April 19, 2005
    Assignees: Canon Kabushiki Kaisha, Kabushiki Kaisha Toshiba
    Inventors: Aoji Isono, Tadashi Aoki, Kazuhiko Murayama, Kenji Shino, Tsutomu Sakamoto
  • Publication number: 20040217950
    Abstract: A drive circuit includes a drive transistor connected at a pair of its main electrodes respectively to a drive output terminal side and a reference voltage source VEE side, an operational amplifier for controlling an output voltage that is output from the drive transistor, a detection transistor for detecting a current that flows through the drive transistor, a first feedback loop for detecting an output voltage at the drive output terminal and feeding back the output voltage to the operational amplifier, and a second feedback loop for detecting an output current of the detection transistor and feeding back the output current to the operational amplifier. The drive transistor and the detection transistor form a mirror circuit.
    Type: Application
    Filed: January 30, 2004
    Publication date: November 4, 2004
    Applicants: CANON KABUSHIKI KAISHA, KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenji Shino, Yasukazu Noine
  • Patent number: 6809480
    Abstract: Even if an output voltage from a high-voltage power source includes a ripple, this invention reduces the influence on a luminance output and suppresses the capacitances of a high-voltage power source transformer and smoothing capacitor. An electron-beam apparatus adopts line-sequential driving of allowing a plurality of electron-emitting devices to simultaneously emit electrons in an arrangement in which an accelerating potential for accelerating electrons includes a ripple. At the same time, sets of devices allowed to simultaneously emit electrons are sequentially switched. The frequency of the ripple is synchronized with the selection frequency of line-sequential driving.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: October 26, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kenji Shino
  • Publication number: 20040032405
    Abstract: A modulator circuit (102) is capable of outputting n kinds of unit pulses with the identical width and with peak values A1 to An and controls the peak value and width of a modulation signal through changing the kind and the number of output unit pulses in accordance with luminance data. In case of outputting more than one unit pulse with the maximal peak value out of unit pulses which comprise the modulation signal, the modulator circuit (102) makes the pulses appear dispersedly within an effective light emission time period. With such an arrangement, it is possible to suppress a decrease in display quality otherwise occurring due to voltage drop of row wirings.
    Type: Application
    Filed: June 12, 2003
    Publication date: February 19, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tadashi Aoki, Aoji Isono, Kazuhiko Murayama, Kenji Shino, Yasuhiko Sano
  • Publication number: 20040001039
    Abstract: The present invention can provide a driving apparatus capable of compensating an influence of a voltage drop at low costs in a simple manner, which includes: a column driver circuit that generates at least one of modulation signals different in start reference time in one horizontal scanning period and the modulation signals obtained by using pulse width modulation and voltage amplitude modulation in combination; and a correction circuit that corrects a voltage of the row selection signal so as to suppress a voltage variation of the row selection signal, which is caused due to at least a resistance of an output stage of the row driver circuit and a current caused to flow into the resistance.
    Type: Application
    Filed: June 13, 2003
    Publication date: January 1, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kenji Shino, Tadashi Aoki, Aoji Isono, Kazuhiko Murayama, Yasuhiko Sano
  • Publication number: 20030063108
    Abstract: A drive signal generation circuit which performs gradation control on a load by a drive signal having a stepped waveform. In a case where the wave height value corresponding to input gradation data is Vm (2≦m≦n), the drive signal is caused to rise in such a manner that each output Vk (2≦k≦m) is produced one slot after the output V(k−1) to increase the wave height value V0 (reference potential) to Vm in a stepping manner. One slot corresponds to a unit time of the pulse width modulation. The drive signal is caused to fall in such a manner that each output V(k−1) (1≦k≦m−1) is produced one or two slots after the output Vk to reduce the wave height value from Vm to off level in a stepping manner. A delay circuit is used to delay signals slot by slot. A selection is made from delayed signals according to luminance data to determine a waveform. The circuit is also designed to enable the drive signal waveform rise position to be changed.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 3, 2003
    Inventors: Aoji Isono, Tadashi Aoki, Kazuhiko Murayama, Kenji Shino, Tsutomu Sakamoto
  • Publication number: 20030038792
    Abstract: An image display apparatus having a plurality of image forming devices. In an output circuit provided between constant voltage supplies and wiring for driving each of the image forming devices, MOSFETs are successively turned on from the one having a higher ON resistance at the time of switching to make a stepwise transition between outputs from the constant voltage supplies, and have steady potential, thereby limiting undesirable variation in signal potential at the time of switching.
    Type: Application
    Filed: August 5, 2002
    Publication date: February 27, 2003
    Inventors: Kazuhiko Murayama, Tadashi Aoki, Aoji Isono, Kenji Shino
  • Publication number: 20030025687
    Abstract: A scanning circuit and an image display device in which the influence of losses in a signal path to scanning wiring and a scanning signal output circuit can be reduced. By considering matrix drive in which one row is driven at a time and two or more of the rows are not simultaneously driven, the 480 rows are divided into six modules and one feedback circuit is provided in correspondence with each module to perform feedback control of the output buffers corresponding to 80 rows. An output from a switch is amplified by an operational amplifier and is input as a compensation signal to all the output buffers by an output voltage compensation circuit. Compensation for a voltage drop is made by using the compensation signal for an increase in voltage such that the apparent voltage drop due to the output current is limited to a small value.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 6, 2003
    Inventors: Kenji Shino, Tadashi Aoki, Aoji Isono, Kazuhiko Murayama
  • Publication number: 20020195966
    Abstract: The present invention discloses an invention about a drive waveform for driving an image display unit. In particular, the present invention discloses the structure of using as a drive waveform a drive waveform signal which is level controlled by a plural of discontinuous levels including a minimum level which is a level corresponding to luminance brightness gradation data which is not 0, at least one non-minimum level which is a level corresponding to larger luminance brightness gradation data, and an intermediate level between the above-described minimum level and the above-described non-minimum level, and is given pulse width control with discontinuous pulse width, and which has a portion, which is controlled with the above-described minimum level, in its trailing edge, and a portion, which is controlled with the above-described intermediate level just before the former portion, when it has the portion controlled by the above-described non-minimum level.
    Type: Application
    Filed: June 13, 2002
    Publication date: December 26, 2002
    Inventors: Tadashi Aoki, Kazunori Katakura, Aoji Isono, Kazuhiko Murayama, Kenji Shino