Patents by Inventor Kenji Takechi

Kenji Takechi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Microprocessor having timer circuit generating complementary non-overlapped PWM signals
    Patent number: 5933344
    Abstract: Two up-counters and two down-counters having a time difference corresponding to a dead time are provided to realize an up-down symmetric count, such that the up-counters and the down-counters are made to count the lower limit and the upper limit (a 1/2 period+the dead time), the up-counter for counting a relatively large value and the down-counter for counting a relatively large value are made to contact at the upper limit, the up-counter for counting a relatively small value and the down-counter for counting a relatively small value are made to intersect at a count value corresponding to the 1/2 period, the up-counter for counting the relatively large value and the down-counter for counting the relatively large value are made to intersect at the count value corresponding to the dead time, and the up-counter for counting the relatively small value and the down-counter for counting the relatively small value are made to contact at the lower limit.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Mitsuishi, Hiroshi Saito, Kenji Takechi, Hisashi Kajiwara, Hiromasa Yamagata, Koichi Hashimura