Patents by Inventor Kenji Tominaga

Kenji Tominaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240115546
    Abstract: A novel target molecule for pruritus was found, and a novel means for eliminating pruritus is provided.
    Type: Application
    Filed: November 24, 2023
    Publication date: April 11, 2024
    Applicant: KAO CORPORATION
    Inventors: Tomohiro MATSUMOTO, Masafumi YOKOTA, Junko ISHIKAWA, Mitsutoshi TOMINAGA, Kenji TAKAMORI
  • Publication number: 20230056651
    Abstract: In an accelerator device, a pedal is rotatable in an accelerator opening direction by a pedaling force of a pad. An arm connects the pedal to the pad. A biasing member biases the pedal in an accelerator closing direction via the arm. The arm has a shaft portion that is assembled to the pad, and the pad has a pair of support walls that rotatably support the shaft portion. The pair of support walls have wall surfaces facing each other, each of the which is provided with a bearing portion and a thickening portion. The thickening portion includes a curved surface or a slope surface having a surface area broader as a distance from the bearing portion increases.
    Type: Application
    Filed: November 7, 2022
    Publication date: February 23, 2023
    Inventors: Noriyasu KIHARA, Yasuhiro OTAKA, Kenji TOMINAGA
  • Patent number: 8900965
    Abstract: A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: December 2, 2014
    Assignee: Panasonic Corporation
    Inventors: Haruyuki Sorada, Takumi Mikawa, Kenji Tominaga, Kiyotaka Tsuji
  • Patent number: 8551853
    Abstract: A non-volatile semiconductor memory device comprises a plurality of memory cell holes (101) formed through an interlayer insulating layer (80) at respective cross-points of a plurality of first wires (10) of a stripe shape and a plurality of second wires (20) of a stripe shape when viewed from above such that the memory cell holes (101) expose upper surfaces of the plurality of first wires, respectively, a plurality of dummy holes (111) formed on the plurality of first wires in the interlayer insulating layer such that the dummy holes reach the upper surfaces of the plurality of first wires, respectively, and stacked-layer structures formed inside the memory cell holes and inside the dummy holes, respectively, each of the stacked-layer structures including a first electrode (30) and a variable resistance layer (40); an area of a portion of the first wire which is exposed in a lower opening of one of the dummy holes being greater than an area of a portion of the first wire which is exposed in a lower opening o
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 8, 2013
    Assignee: Panasonic Corporation
    Inventors: Kiyotaka Tsuji, Takumi Mikawa, Kenji Tominaga
  • Publication number: 20130224931
    Abstract: A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.
    Type: Application
    Filed: March 21, 2012
    Publication date: August 29, 2013
    Inventors: Haruyuki Sorada, Takumi Mikawa, Kenji Tominaga, Kiyotaka Tsuji
  • Patent number: 8394669
    Abstract: A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Koji Arita, Takumi Mikawa, Atsushi Himeno, Yoshio Kawashima, Kenji Tominaga
  • Patent number: 8384061
    Abstract: A nonvolatile memory device of the present invention includes a substrate (1), first wires (3), first resistance variable elements (5) and lower electrodes (6) of first diode elements which are filled in first through-holes (4), respectively, second wires (11) which cross the first wires 3 perpendicularly to the first wires 3, respectively, and each of which includes a semiconductor layer (7) of a first diode elements, a conductive layer (8) and a semiconductor layer (10) of a second diode elements which are stacked together in this order, second resistance variable elements (16) and upper electrodes (14) of second diode elements which are filled into second through holes (13), respectively, and third wires (17), and the conductive layer (8) of each second wires (11) also serves as the upper electrode of the first diode elements (9) and the lower electrode of the second diode elements (15).
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: February 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Takumi Mikawa, Kenji Tominaga, Kazuhiko Shimakawa, Ryotaro Azuma
  • Patent number: 8355274
    Abstract: A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0<x?0.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: January 15, 2013
    Assignee: Panasonic Corporation
    Inventors: Koji Arita, Takumi Mikawa, Mitsuteru IIjima, Kenji Tominaga
  • Publication number: 20120181500
    Abstract: A non-volatile semiconductor memory device comprises a plurality of memory cell holes (101) formed through an interlayer insulating layer (80) at respective cross-points of a plurality of first wires (10) of a stripe shape and a plurality of second wires (20) of a stripe shape when viewed from above such that the memory cell holes (101) expose upper surfaces of the plurality of first wires, respectively, a plurality of dummy holes (111) formed on the plurality of first wires in the interlayer insulating layer such that the dummy holes reach the upper surfaces of the plurality of first wires, respectively, and stacked-layer structures formed inside the memory cell holes and inside the dummy holes, respectively, each of the stacked-layer structures including a first electrode (30) and a variable resistance layer (40); an area of a portion of the first wire which is exposed in a lower opening of one of the dummy holes being greater than an area of a portion of the first wire which is exposed in a lower opening o
    Type: Application
    Filed: July 7, 2011
    Publication date: July 19, 2012
    Inventors: Kiyotaka Tsuji, Takumi Mikawa, Kenji Tominaga
  • Patent number: 8198618
    Abstract: A nonvolatile memory device of the present invention comprises a substrate (1), first wires (3), first filling constituents (5) filled into first through-holes (4), respectively, second wires (11) which cross the first wires (3) perpendicularly to the first wires (3), respectively, each of the second wires (11) including a plurality of layers including a resistance variable layer (6) of each of first resistance variable elements, a conductive layer (7) and a resistance variable layer (8) of each of second resistance variable elements which are stacked together in this order, second filling constituents (14) filled into second through-holes (13), respectively, and third wires (15), and the conductive layer (7) of the second wires (11) serves as the electrodes of the first resistance variable elements (9) and the electrodes of the second resistance variable elements (10).
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: June 12, 2012
    Assignee: Panasonic Corporation
    Inventors: Takumi Mikawa, Kenji Tominaga, Kazuhiko Shimakawa, Ryotaro Azuma
  • Patent number: 8090073
    Abstract: A recirculation pump motor is supplied with a power from a unit auxiliary middle voltage bus through a power supply system including a first circuit breaker, a voltage source inverter, and a second circuit breaker electrically connected in series to provide a no-load operation by use of the voltage source inverter. The second circuit breaker may be multiplexed with more than one breaker electrically connected in series. An existing nuclear plant using a induction motor driving a hydraulic coupling mechanically coupled to a synchronous generator for driving the recirculation pump, such as an MfG set, may be subjected to a method of replacing the induction motor, the hydraulic coupling, and the synchronous generator with the voltage source inverter and a circuit breaker through electrically disconnection and removal.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: January 3, 2012
    Assignee: Hitachi-GE Nuclear Energy, Ltd.
    Inventors: Masashi Sugiyama, Yukihiro Katayama, Kenji Tominaga, Hirohisa Satomi, Ichirou Shimoda
  • Publication number: 20110220862
    Abstract: A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
    Type: Application
    Filed: July 12, 2010
    Publication date: September 15, 2011
    Inventors: Koji Arita, Takumi Mikawa, Atsushi Himeno, Yoshio Kawashima, Kenji Tominaga
  • Publication number: 20110164447
    Abstract: A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0<x?0.
    Type: Application
    Filed: September 17, 2009
    Publication date: July 7, 2011
    Inventors: Koji Arita, Takumi Mikawa, Mitsuteru Iijima, Kenji Tominaga
  • Publication number: 20100264393
    Abstract: A nonvolatile memory device of the present invention comprises a substrate (1), first wires (3), first filling constituents (5) filled into first through-holes (4), respectively, second wires (11) which cross the first wires (3) perpendicularly to the first wires (3), respectively, each of the second wires (11) including a plurality of layers including a resistance variable layer (6) of each of first resistance variable elements, a conductive layer (7) and a resistance variable layer (8) of each of second resistance variable elements which are stacked together in this order, second filling constituents (14) filled into second through-holes (13), respectively, and third wires (15), and the conductive layer (7) of the second wires (11) serves as the electrodes of the first resistance variable elements (9) and the electrodes of the second resistance variable elements (10).
    Type: Application
    Filed: December 2, 2008
    Publication date: October 21, 2010
    Inventors: Takumi Mikawa, Kenji Tominaga, Kazuhiko Shimakawa, Ryotaro Azuma
  • Publication number: 20100258779
    Abstract: A nonvolatile memory device of the present invention includes a substrate (1), first wires (3), first resistance variable elements (5) and lower electrodes (6) of first diode elements which are filled in first through-holes (4), respectively, second wires (11) which cross the first wires 3 perpendicularly to the first wires 3, respectively, and each of which includes a semiconductor layer (7) of a first diode elements, a conductive layer (8) and a semiconductor layer (10) of a second diode elements which are stacked together in this order, second resistance variable elements (16) and upper electrodes (14) of second diode elements which are filled into second through holes (13), respectively, and third wires (17), and the conductive layer (8) of each second wires (11) also serves as the upper electrode of the first diode elements (9) and the lower electrode of the second diode elements (15).
    Type: Application
    Filed: November 6, 2008
    Publication date: October 14, 2010
    Inventors: Takumi Mikawa, Kenji Tominaga, Kazuhiko Shimakawa, Ryotaro Azuma
  • Publication number: 20050201507
    Abstract: A recirculation pump motor is supplied with a power from a unit auxiliary middle voltage bus through a power supply system including a first circuit breaker, a voltage source inverter, and a second circuit breaker electrically connected in series to provide a no-load operation by use of the voltage source inverter. The second circuit breaker may be multiplexed with more than one breaker electrically connected in series. An existing nuclear plant using a induction motor driving a hydraulic coupling mechanically coupled to a synchronous generator for driving the recirculation pump, such as an MfG set, may be subjected to a method of replacing the induction motor, the hydraulic coupling, and the synchronous generator with the voltage source inverter and a circuit breaker through electrically disconnection and removal.
    Type: Application
    Filed: January 10, 2005
    Publication date: September 15, 2005
    Inventors: Masashi Sugiyama, Yukihiro Katayama, Kenji Tominaga, Hirohisa Satomi, Ichirou Shimoda
  • Patent number: 6686677
    Abstract: To provide an optical device in which fragments of a concave reflection mirror surrounding a discharge lamp and fragments of an optically permeable glass plate covering the aperture at the front of the concave reflection mirror do not fall and scatter, even if a short-arc high pressure discharge lamp that lights at extremely high mercury vapor pressure should rupture, the outer surface of the glass concave reflection mirror (20) surrounding the high pressure mercury discharge lamp (10) in which 0.16 mg/mm3 or more of mercury is sealed in a discharge envelope is covered by a scatter prevention film (40) made of a polymer material, for example, a fluorine-based resin. Furthermore, a scatter prevention film is applied to the outer surface of the concave reflection mirror in a region of incidence of light over a range within ±40° of the direction orthogonal to the axis of the high pressure mercury discharge lamp.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: February 3, 2004
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventors: Yoshiteru Kondo, Kenji Tominaga
  • Publication number: 20030098637
    Abstract: To provide an optical device in which fragments of a concave reflection mirror surrounding a discharge lamp and fragments of an optically permeable glass plate covering the aperture at the front of the concave reflection mirror do not fall and scatter, even if a short-arc high pressure discharge lamp that lights at extremely high mercury vapor pressure should rupture, the outer surface of the glass concave reflection mirror (20) surrounding the high pressure mercury discharge lamp (10) in which 0.16 mg/mm3 or more of mercury is sealed in a discharge envelope is covered by a scatter prevention film (40) made of a polymer material, for example, a fluorine-based resin. Furthermore, a scatter prevention film is applied to the outer surface of the concave reflection mirror in a region of incidence of light over a range within ±40° of the direction orthogonal to the axis of the high pressure mercury discharge lamp.
    Type: Application
    Filed: December 15, 2000
    Publication date: May 29, 2003
    Inventors: Yoshiteru Kondo, Kenji Tominaga
  • Patent number: 6501563
    Abstract: A judgement section (10) and a ratio calculation section (11) in an image processing apparatus input image signals in digital form of n color components forming colors, transferred externally in time series, and calculate conversion parameters indicating change of ratios of signal strength values between input image signals per color component based on a total sum of the ratios of synthesis signal values, each conversion section (12, 13, 14) and a signal range calculation section (15) converts input image signals to output image signal without any change of the ratio of signal strength values between the input image signals based on the conversion parameters, per color component.
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: December 31, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tsuneo Sato, Masayuki Saito, Kenji Tominaga, Tomoki Yoshimura
  • Patent number: 6485740
    Abstract: A methotrexate-containing transdermal preparation effective for rheumatoid arthritis comprises an organic amine. The organic amine may preferably be an alkonolamine such as monoethanolamine, diethanolamine, triethanolamine or diisopropanolamine, or an alkylamine such as ehtylamine, diethylamine or triethylamine. The transdermal preparation is, for example, a plaster, a cataplasm, an ointment, a cream or a lotion.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: November 26, 2002
    Assignee: Yutoku Pharmaceutical Ind., Co., Ltd.
    Inventors: Kenji Tominaga, Takaaki Hamada