Patents by Inventor Kenji Toyosawa

Kenji Toyosawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8390104
    Abstract: A TAB tape (100) packaging structure in which (i) the TAB tape (100) including a plurality of semiconductor chips (103) which are fixed, on a film (101) on which wiring patterns are repeatedly provided and (ii) an embossed tape (200) which is electroconductive and has embossed parts (202) which are sequentially provided on a first surface of and in a longitudinal direction of a film (201) are wound on a reel which is electroconductive is arranged such that the TAB tape (100) and the embossed tape (200) are wound on the reel, while (i) a first surface of the film (101) on which surface the plurality of semiconductor chips (103) are fixed and (ii) the first surface of the film (201) on which surface the embossed parts (202) protrude are overlapping and facing each other, and the embossed tape (200) has a total thickness of not less than (t+0.4) mm and not more than 1.1 mm in a case where each of the plurality of semiconductor chips (103) has a thickness of t (0.2?t?0.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: March 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Satoru Kudose, Kenji Toyosawa
  • Publication number: 20100230793
    Abstract: A TAB tape (100) packaging structure in which (i) the TAB tape (100) including a plurality of semiconductor chips (103) which are fixed, on a film (101) on which wiring patterns are repeatedly provided and (ii) an embossed tape (200) which is electroconductive and has embossed parts (202) which are sequentially provided on a first surface of and in a longitudinal direction of a film (201) are wound on a reel which is electroconductive is arranged such that the TAB tape (100) and the embossed tape (200) are wound on the reel, while (i) a first surface of the film (101) on which surface the plurality of semiconductor chips (103) are fixed and (ii) the first surface of the film (201) on which surface the embossed parts (202) protrude are overlapping and facing each other, and the embossed tape (200) has a total thickness of not less than (t+0.4) mm and not more than 1.1 mm in a case where each of the plurality of semiconductor chips (103) has a thickness of t (0.2?t?0.
    Type: Application
    Filed: November 7, 2008
    Publication date: September 16, 2010
    Inventors: Satoru Kudose, Kenji Toyosawa
  • Patent number: 7768136
    Abstract: A semiconductor device such as a COF or the like is provided on a semiconductor chip on a film-like shaped flexile wiring substrate on which a wiring pattern is formed. Between the semiconductor chip and the flexile wiring substrate, a sealing resin is filled for protecting the semiconductor chip. In the semiconductor device, a resin trace is 0.1 to 1.0 mm in width and 10 ?m in thickness, the resin trace being formed when applying the sealing resin along a longitudinal side of the semiconductor chip.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: August 3, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuhiko Fukuta, Kenji Toyosawa
  • Patent number: 7638854
    Abstract: A semiconductor device is provided that includes wiring patterns on a substrate formed of an organic insulating film, and a semiconductor chip mounted on the substrate. A liquid crystal display panel and a PW board are electrically connected to each other with an anisotropic conductive adhesive. At least one surface of the insulating film is treated with a silicon coupling material. The silicon coupling material contains silicon (Si) at a surface element density of 0.5 atomic percent to 12.0 atomic percent on a surface of the insulating film.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: December 29, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiko Tanaka, Kenji Toyosawa
  • Patent number: 7582976
    Abstract: The present invention provides a semiconductor device tape carrier formed of an insulative tape 1 of a thin film, which becomes a semiconductor device by conducting a plurality of wire patterns 11 on its surface to a bump 23 of a semiconductor element 21 and being sealed by an insulative resin 22, wherein: an outer dimension of the semiconductor device in a carriage direction of the insulative tape 1 is greater than an integral multiple X (X=1, 2, 3, 4, 5, . . . ) of a pitch interval of sprocket holes 2, which are openings formed to carry the insulative tape 1, and not more than: the integral multiple X+a decimal Y (0<Y<1), and the tape pitch for a single semiconductor device is set to the integral multiple X+a decimal Y (0<Y<1).
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: September 1, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiharu Seko, Kenji Toyosawa
  • Patent number: 7474008
    Abstract: A high reliability semiconductor device is provided which can prevent electromigration due to the deposition of metal ions originating from wires. The device includes: a flexible wiring board 11 including a base film 1 and multiple wires 9; a semiconductor chip 5 mounted to the flexible wiring board 11; and a sealing resin 6 disposed between the flexible wiring board 11 and the semiconductor chip 5 so as to at least partially in contact with the wires 9. The sealing resin 6 contains a metal ion binder mixed thereto.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: January 6, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuhiko Fukuta, Kenji Toyosawa, Takashi Kidoguchi
  • Publication number: 20080061432
    Abstract: The present invention provides a semiconductor device tape carrier formed of an insulative tape 1 of a thin film, which becomes a semiconductor device by conducting a plurality of wire patterns 11 on its surface to a bump 23 of a semiconductor element 21 and being sealed by an insulative resin 22, wherein: an outer dimension of the semiconductor device in a carriage direction of the insulative tape 1 is greater than an integral multiple X (X=1, 2, 3, 4, 5, . . . ) of a pitch interval of sprocket holes 2, which are openings formed to carry the insulative tape 1, and not more than: the integral multiple X+a decimal Y (0?Y?1), and the tape pitch for a single semiconductor device is set to the integral multiple X+a decimal Y (0?Y?1).
    Type: Application
    Filed: September 6, 2007
    Publication date: March 13, 2008
    Inventors: Toshiharu Seko, Kenji Toyosawa
  • Patent number: 7193328
    Abstract: Provided is a semiconductor device which prevents displacement of a semiconductor element and a wiring pattern of a wiring substrate so as to ensure the connection of the semiconductor element and the wiring pattern. The semiconductor device of the present invention includes a semiconductor element and a wiring substrate which is provided with a film substrate and a wiring pattern which is formed on the film substrate, the semiconductor element is connected to the wiring pattern, and the semiconductor element and the wiring substrate are sealed with a resin. A metallic film, made of material having a smaller coefficient of linear thermal expansion than the film substrate, is formed in a region where the wiring pattern is not formed on at least one surface of the film substrate.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: March 20, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takehiro Suzuki, Kenji Toyosawa
  • Patent number: 7164205
    Abstract: A semiconductor carrier film includes (i) a base film having insulating property, (ii) a barrier layer provided on the base film, the barrier layer including nickel-chrome alloy as a main component, and (iii) a wire layer provided on the barrier layer, the wire layer being made of conductive material including copper, and a ratio of chrome in the barrier layer is 15% to 50% by weight. A semiconductor device is formed by bonding a semiconductor element to the wire layer. The semiconductor carrier film and the semiconductor device are suitable for attaining finer pitches and higher outputs, because insulating resistance between adjacent terminals is less likely to deteriorate then in conventional art even in the environment of high temperature and moisture.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: January 16, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhisa Yamaji, Kenji Toyosawa
  • Publication number: 20060170085
    Abstract: A semiconductor device such as a COF or the like is provided on a semiconductor chip on a film-like shaped flexile wiring substrate on which a wiring pattern is formed. Between the semiconductor chip and the flexile wiring substrate, a sealing resin is filled for protecting the semiconductor chip. In the semiconductor device, a resin trace is 0.1 to 1.0 mm in width and 10 ?m in thickness, the resin trace being formed when applying the sealing resin along a longitudinal side of the semiconductor chip.
    Type: Application
    Filed: February 1, 2006
    Publication date: August 3, 2006
    Inventors: Kazuhiko Fukuta, Kenji Toyosawa
  • Publication number: 20060158861
    Abstract: A semiconductor device of a film carrier package type in which wiring patterns formed on a flexible film are connected to electrodes that are used to make contacts with an external circuit and are formed on a semiconductor element or semiconductor elements mounted on the semiconductor device. The flexible film is designed so that the product of Young's modulus and the cube of film thickness of a material of the flexible film is smaller than 4.03×10?4 (Pa·m3), and that the inverse of the product of Young's modulus and thickness of the flexible film material is smaller than 4.42×10?6 (Pa?1·m?1). As a result, a semiconductor device and a display module using it are provided in which a substrate formed of a base film can be suitably bent, and in which sprocket holes of the base film will not be broken during transport.
    Type: Application
    Filed: January 18, 2006
    Publication date: July 20, 2006
    Inventors: Yasushi Shouji, Kenji Toyosawa
  • Publication number: 20060157827
    Abstract: A semiconductor device is provided that includes wiring patterns on a substrate formed of an organic insulating film, and a semiconductor chip mounted on the substrate. A liquid crystal display panel and a PW board are electrically connected to each other with an anisotropic conductive adhesive. At least one surface of the insulating film is treated with a silicon coupling material. The silicon coupling material contains silicon (Si) at a surface element density of 0.5 atomic percent to 12.0 atomic percent on a surface of the insulating film.
    Type: Application
    Filed: January 17, 2006
    Publication date: July 20, 2006
    Inventors: Yasuhiko Tanaka, Kenji Toyosawa
  • Publication number: 20050263909
    Abstract: A high reliability semiconductor device is provided which can prevent electromigration due to the deposition of metal ions originating from wires. The device includes: a flexible wiring board 11 including a base film 1 and multiple wires 9; a semiconductor chip 5 mounted to the flexible wiring board 11; and a sealing resin 6 disposed between the flexible wiring board 11 and the semiconductor chip 5 so as to at least partially in contact with the wires 9. The sealing resin 6 contains a metal ion binder mixed thereto.
    Type: Application
    Filed: May 20, 2005
    Publication date: December 1, 2005
    Inventors: Kazuhiko Fukuta, Kenji Toyosawa, Takashi Kidoguchi
  • Publication number: 20050233613
    Abstract: A coupling structure of electronic components, by which the break down of drive wiring at the time of folding a flexible substrate is prevented and the reliability of wiring is increased, is realized. In the coupling structure of electronic components of the present invention, a liquid crystal driver and a liquid crystal panel are arranged such that a surface of the flexible substrate, that surface being provided with the drive wiring and a solder resist, faces a surface of an element substrate, that surface being provided with display wiring. Furthermore, the drive wiring and the display wiring are electrically coupled to each other, and the solder resist is in contact with the element substrate.
    Type: Application
    Filed: April 18, 2005
    Publication date: October 20, 2005
    Inventors: Katsuyuki Naitoh, Kenji Toyosawa
  • Publication number: 20050206016
    Abstract: Resin-sealing of a semiconductor element is carried out in two processes, by (I) forming a first sealing-resin layer by (i) sealing a connecting region of the semiconductor element and a wiring pattern with a first sealing resin, and (ii) curing the first sealing-resin, and then (II) forming a second sealing-resin layer by (i) providing the semiconductor element with a second sealing resin so that at least an edge portion of the semiconductor element is sealed, and (ii) curing the second sealing-resin. A semiconductor device thus obtained has a two-layer structure of the sealing-resin including (I) the first sealing-resin layer sealing the connecting region of the semiconductor element and the wiring pattern and (II) the second sealing-resin layer being so provided to the semiconductor element that at least an exposed edge portion of the semiconductor element is sealed.
    Type: Application
    Filed: March 18, 2005
    Publication date: September 22, 2005
    Inventors: Yasushi Shohji, Kenji Toyosawa
  • Patent number: 6867490
    Abstract: A semiconductor device of the present invention has two inner inner leads to be bonded with inner-side bump electrodes each placed at a position which is a relatively large distance apart from the edge of a semiconductor chip, between outer-side bump electrodes each placed at a position which is a relatively small distance apart from the edge of the semiconductor chip. At least one of the inner inner leads is bent in accordance with a bonding position with the inner-side bump electrode.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: March 15, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kenji Toyosawa
  • Patent number: 6864562
    Abstract: A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insulating film, (4) a barrier metal layer which is provided on the active element with the interlayer insulating film therebetween, so that the pad metal is formed on the barrier metal layer, and (5) an insulating layer having high adherence to the barrier metal layer, the insulating layer being provided between the interlayer insulating film and the barrier metal layer. With this arrangement, the adherence between the barrier metal layer, the insulating film and the interlayer insulating film is surely improved, and even in the case where an external force is applied to the electrode pad upon bonding or after bonding, the barrier metal layer hardly comes off the part thereunder.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: March 8, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenji Toyosawa, Atsushi Ono, Yasunori Chikawa, Nobuhisa Sakaguchi, Nakae Nakamura, Yukinori Nakata
  • Publication number: 20040262730
    Abstract: A semiconductor carrier film includes (i) a base film having insulating property, (ii) a barrier layer provided on the base film, the barrier layer including nickel-chrome alloy as a main component, and (iii) a wire layer provided on the barrier layer, the wire layer being made of conductive material including copper, and a ratio of chrome in the barrier layer is 15% to 50% by weight. A semiconductor device is formed by bonding a semiconductor element to the wire layer. The semiconductor carrier film and the semiconductor device are suitable for attaining finer pitches and higher outputs, because insulating resistance between adjacent terminals is less likely to deteriorate then in conventional art even in the environment of high temperature and moisture.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 30, 2004
    Inventors: Yasuhisa Yamaji, Kenji Toyosawa
  • Publication number: 20040108594
    Abstract: A semiconductor device of the present invention has two inner inner leads to be bonded with inner-side bump electrodes each placed at a position which is a relatively large distance apart from the edge of a semiconductor chip, between outer-side bump electrodes each placed at a position which is a relatively small distance apart from the edge of the semiconductor chip. At least one of the inner inner leads is bent in accordance with a bonding position with the inner-side bump electrode.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 10, 2004
    Inventor: Kenji Toyosawa
  • Patent number: 6670696
    Abstract: A slit is formed in a polyimide substrate and a copper wiring pattern is formed on the surface of the polyimide substrate. Moreover, solder resist, which has a young's modulus in the range of 5 kgf/mm2 to 70 kgf/mm2 and contains a filler in the range of 10 wt % to 40 wt %, is formed on the copper wiring pattern. Thus, the copper wiring pattern becomes less susceptible to disconnection, and it is possible to provide a flex TCP semiconductor device with high manufacturing yield.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: December 30, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenji Toyosawa, Takurou Asazu, Tomohiko Iwane