Patents by Inventor Kenjiro Hadano

Kenjiro Hadano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8902564
    Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: December 2, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Teppei Akazawa, Kenjiro Hadano, Masahiro Sakuratani
  • Publication number: 20140146438
    Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.
    Type: Application
    Filed: January 29, 2014
    Publication date: May 29, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Teppei AKAZAWA, Kenjiro HADANO, Masahiro SAKURATANI
  • Patent number: 8687344
    Abstract: A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: April 1, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Teppei Akazawa, Kenjiro Hadano, Masahiro Sakuratani
  • Patent number: 8675341
    Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: March 18, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Teppei Akazawa, Kenjiro Hadano, Masahiro Sakuratani
  • Publication number: 20120320495
    Abstract: A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 20, 2012
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Teppei AKAZAWA, Kenjiro HADANO, Masahiro SAKURATANI
  • Publication number: 20120188684
    Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.
    Type: Application
    Filed: January 25, 2012
    Publication date: July 26, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Teppei AKAZAWA, Kenjiro HADANO, Masahiro SAKURATANI
  • Patent number: 7880564
    Abstract: A noise filter array includes filter elements including an LC parallel resonant circuit and an LC series resonant circuit each of which includes a coil and a capacitor provided in proximity in an array and integrally provided with one another. The LC series resonant circuits include ground capacitors having signal-side electrodes. Inductance adjustment conductors are connected to signal-side electrodes of the capacitors defining the respective filter elements, and a ground electrode of the capacitors is commonly arranged so as to oppose the signal-side electrodes.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: February 1, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tomohiro Sasaki, Kenjiro Hadano, Haruhiko Ueno
  • Patent number: 7746197
    Abstract: A noise filter array includes filter elements, each of which includes an LC parallel resonant circuit having a coil and a capacitor and an LC series resonant circuit having a coil and a capacitor, are arranged substantially parallel to one another in an array and integrally provided. Grounding capacitors that define the filter elements are arranged so that a common ground-side electrode faces signal-side electrodes and is connected to an inductance adjusting conductor that defines the LC series resonant circuits along with the capacitors through a via hole. The lengths of the inductance adjusting conductor from a connection location within the via hole to ground terminals are substantially equal in each of the filter elements.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: June 29, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenjiro Hadano, Tomohiro Sasaki, Haruhiko Ueno
  • Patent number: 7663453
    Abstract: A multilayer array electronic component includes a multilayer composite including a helical coil and a capacitor that are defined by stacking a coil conductor, a capacitor conductor, and a ceramic sheet on one another. External electrodes are arranged on the surface of the multilayer composite and electrically connected to the helical coil or the capacitor. A direction identification mark is arranged on the upper surface of the multilayer composite and electrically connected to any of the external electrodes through the helical coil or the capacitor.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: February 16, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenjiro Hadano, Tomohiro Sasaki, Yoshihisa Kimura, Takafumi Kusuyama
  • Patent number: 7605683
    Abstract: In a monolithic electronic component in which a resistive element is incorporated by forming a resistor film on a terminal electrode, a plating film can be formed on the terminal electrode having the resistor film via electroplating in an efficient manner and with a uniform film thickness. In order to form the terminal electrode, the resistor film is disposed directly on the surface of the component body, and a conductive resin film having a relatively low volume resistivity is disposed over the resistor film. The conductive resin film is preferably adapted to have a specific resistance of less than about 1×10?4 ?·m, on which a plating film having a uniform film thickness can be formed efficiently via electroplating.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: October 20, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takashi Sawada, Kenjiro Hadano
  • Publication number: 20090134956
    Abstract: A multilayer array electronic component includes a multilayer composite including a helical coil and a capacitor that are defined by stacking a coil conductor, a capacitor conductor, and a ceramic sheet on one another. External electrodes are arranged on the surface of the multilayer composite and electrically connected to the helical coil or the capacitor. A direction identification mark is arranged on the upper surface of the multilayer composite and electrically connected to any of the external electrodes through the helical coil or the capacitor.
    Type: Application
    Filed: January 9, 2009
    Publication date: May 28, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenjiro Hadano, Tomohiro Sasaki, Yoshihisa Kimura, Takafumi Kusuyama
  • Publication number: 20090121806
    Abstract: A noise filter array includes filter elements including an LC parallel resonant circuit and an LC series resonant circuit each of which includes a coil and a capacitor provided in proximity in an array and integrally provided with one another. The LC series resonant circuits include ground capacitors having signal-side electrodes. Inductance adjustment conductors are connected to signal-side electrodes of the capacitors defining the respective filter elements, and a ground electrode of the capacitors is commonly arranged so as to oppose the signal-side electrodes.
    Type: Application
    Filed: January 23, 2009
    Publication date: May 14, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomohiro SASAKI, Kenjiro HADANO, Haruhiko UENO
  • Publication number: 20090108958
    Abstract: A noise filter array includes filter elements, each of which includes an LC parallel resonant circuit having a coil and a capacitor and an LC series resonant circuit having a coil and a capacitor, are arranged substantially parallel to one another in an array and integrally provided. Grounding capacitors that define the filter elements are arranged so that a common ground-side electrode faces signal-side electrodes and is connected to an inductance adjusting conductor that defines the LC series resonant circuits along with the capacitors through a via hole. The lengths of the inductance adjusting conductor from a connection location within the via hole to ground terminals are substantially equal in each of the filter elements.
    Type: Application
    Filed: January 12, 2009
    Publication date: April 30, 2009
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenjiro HADANO, Tomohiro SASAKI, Haruhiko UENO
  • Publication number: 20080128860
    Abstract: In a monolithic electronic component in which a resistive element is incorporated by forming a resistor film on a terminal electrode, a plating film can be formed on the terminal electrode having the resistor film via electroplating in an efficient manner and with a uniform film thickness. In order to form the terminal electrode, the resistor film is disposed directly on the surface of the component body, and a conductive resin film having a relatively low volume resistivity is disposed over the resistor film. The conductive resin film is preferably adapted to have a specific resistance of less than about 1×10?4 ?·m, on which a plating film having a uniform film thickness can be formed efficiently via electroplating.
    Type: Application
    Filed: February 12, 2008
    Publication date: June 5, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi SAWADA, Kenjiro HADANO
  • Patent number: 6184769
    Abstract: A monolithic varistor includes a sintered layered body and a pair of external electrodes disposed on opposite ends of the layered body. The layered body is composed of a plurality of varistor sheets and a plurality of valistor electrodes, which are layered on one another and integrally fired. T is defined as the distance between the varistor electrodes, and Ty is defined as the distance between an outermost varistor electrode and the upper surface of the sintered layered body. Further, Tx is defined as the distance between the external electrodes and the corresponding edges of the varistor electrodes. The varistor is designed in order to satisfy one of the following three conditions: Condition (A) 1.5≦(Tx/T)≦3.0 Condition (B) (Ty/T)≧1.0 Condition (C) 1.5≦(Tx/T)≦3.0 and (Ty/T)≧1.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: February 6, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazutaka Nakamura, Kazuhiro Kaneko, Tsuyoshi Kawada, Kenjiro Hadano
  • Patent number: 6147587
    Abstract: A laminated-type varistor includes a laminated structure and a pair of external electrodes disposed on a surface of the laminated structure. The laminated structure includes effective sintered body layers and internal electrodes. The internal electrodes are connected to the external electrodes and are disposed apart from each other in the direction perpendicular to lamination surfaces. Each of the internal electrodes has a multilayer electrode structure in which a plurality of electrode layers are arranged in layers while an ineffective sintered body layer is disposed therebetween. The laminated-type varistor has increased maximum peak current and maximum energy and reduction in clamping voltage.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: November 14, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenjiro Hadano, Tsuyoshi Kawada, Iwao Fukutani, Kazutaka Nakamura, Kuzuhiro Kaneko, Ryouichi Urahara