Patents by Inventor Kenjiyu Shimogawa

Kenjiyu Shimogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory device and semiconductor memory device operation method
    Patent number: 8050108
    Abstract: Provided is a destructive readout semiconductor memory device capable of avoiding concentration of a writeback current, in which a switch circuit (24) is provided between each bit line (21) and each sense amplifier (26). In writeback, the switch circuits are turned on at staggered time points. In readout, the switch circuits are turned on to read memory cell data to the sense amplifiers while the sense amplifiers are turned off, and the switch circuits are then turned off once. After that, the sense amplifiers are turned on to amplify the read data. The switch circuits are subsequently divided into groups and turned on again to write back the data amplified by the sense amplifiers to the memory cells. The switch circuits are divided into groups to be turned on at staggered time points during the writeback, to thereby avoid concentration of the writeback current in one time period.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: November 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kenjiyu Shimogawa, Hiroshi Furuta, Shunsaku Naga, Takayuki Shirai
  • SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE OPERATION METHOD
    Publication number: 20100110814
    Abstract: Provided is a destructive readout semiconductor memory device capable of avoiding concentration of a writeback current, in which a switch circuit (24) is provided between each bit line (21) and each sense amplifier (26). In writeback, the switch circuits are turned on at staggered time points. In readout, the switch circuits are turned on to read memory cell data to the sense amplifiers while the sense amplifiers are turned off, and the switch circuits are then turned off once. After that, the sense amplifiers are turned on to amplify the read data. The switch circuits are subsequently divided into groups and turned on again to write back the data amplified by the sense amplifiers to the memory cells. The switch circuits are divided into groups to be turned on at staggered time points during the writeback, to thereby avoid concentration of the writeback current in one time period.
    Type: Application
    Filed: November 3, 2009
    Publication date: May 6, 2010
    Inventors: Kenjiyu Shimogawa, Hiroshi Furuta, Shunsaku Naga, Takayuki Shirai