Abstract: Signal conversion is implemented employing a memory system operating as a look-up table that stores a plurality of sets of output samples associated with each of a plurality of respective input samples. The look-up table thus can generate a corresponding set of output samples in response to a given input sample, thereby emulating desired digital upsampling and delta-sigma modulation. The output samples can be aggregated, such as by multiplexing, to provide an output data stream at a desired sample rate.

Abstract: Frequency synthesis is implemented by providing a delta-sigma modulated signal associated with a selected frequency, which frequency can vary based on a selection input. The delta-sigma modulated signal is converted from the digital to analog domain. The delta-sigma modulated signal can be provided directly from memory based on the selection input or, alternatively, it can be provided by a signal generator and processed by a delta-sigma modulator to provide the delta-sigma modulated signal. The selected frequency can be varied at a high rate of speed.

Abstract: The invention relates to a lower portion of an electric and electronic enclosure, comprising a bottom and fastening arrangements for fastening a cover to the lower portion with a bayonet-like fastening, the fastening arrangements comprising a bore and a shoulder-like stopper for receiving a mounting bracket of a spindle-like element. So as to be able to fasten the cover to the lower portion with either bayonet snap lock means or conventional screws, the bore of the lower portion comprises threads for receiving the screw. The invention also relates to an electric and electronic enclosure.

Abstract: Signal conversion of an input signal can be achieved by processing portions of the signal through plural parallel paths, which collectively approximate a desired infinite impulse response (IIR) filter, either alone or implemented with other signal processing functions. In one aspect, each of the paths can perform filtering, noise-shaping and/or quantization on a respective portion of the input signal to provide a corresponding representation of the respective portion of the input signal, for example, a coarser representation at a higher data rate. The corresponding representations from the parallel paths can be aggregated and further processed in a desired manner, such as conversion to an analog signal.

Abstract: Frequency synthesis is implemented by providing a delta-sigma modulated signal associated with a selected frequency, which frequency can vary based on a selection input. The delta-sigma modulated signal is converted from the digital to analog domain. The delta-sigma modulated signal can be provided directly from memory based on the selection input or, alternatively, it can be provided by a signal generator and processed by a delta-sigma modulator to provide the delta-sigma modulated signal. The selected frequency can be varied at a high rate of speed.

Abstract: Signal conversion is implemented employing a memory system operating as a look-up table that stores a plurality of sets of output samples associated with each of a plurality of respective input samples. The look-up table thus can generate a corresponding set of output samples in response to a given input sample, thereby emulating desired digital upsampling and delta-sigma modulation. The output samples can be aggregated, such as by multiplexing, to provide an output data stream at a desired sample rate.

Abstract: Signal conversion of an input signal can be achieved by processing portions of the signal through plural parallel paths, which collectively approximate a desired infinite impulse response (IIR) filter, either alone or implemented with other signal processing functions. In one aspect, each of the paths can perform filtering, noise-shaping and/or quantization on a respective portion of the input signal to provide a corresponding representation of the respective portion of the input signal, for example, a coarser representation at a higher data rate. The corresponding representations from the parallel paths can be aggregated and further processed in a desired manner, such as conversion to an analog signal.

Abstract: The present invention provides a detachable mounting mechanism for a fuel injector wiring harness cover. The cover is detachably mounted to a fuel injector assembly such as a fuel injector rail. The cover includes a base which has a channel for receiving the fuel injector wiring harness. A lid is adapted to be mounted on the base, thereby securing the fuel injector wiring harness within the channel. A pair of locking structures extend outwardly from the base. Each locking structure includes a continuous outer wall which defines a cavity adapted to receive a mounting tab located on the fuel injector assembly. A locking lever is pivotally attached to each locking structure and has a locked position and a released position. The locking lever is biased in the locked position. The locking lever includes an integrally formed handle extending outwardly from the locking structure and an integrally formed projection which extends into the cavity.