Abstract: A throttling engine throttles access to a high latency hybrid memory. A request is received for partition mapping of a virtual address for an R/W memory page. An entry is added to a partition page table that maps a virtual address to a physical address and comprises access information that is R/W. A throttled flag is set in an entry of a partition page extension table. The throttle entry corresponds to the entry. The access information is saved in an original access part of the partition page extension table, and the access information is replaced with an R value. Upon application fault receipt, a throttling test is performed on an address of the application fault. If the throttling test is false, the fault is passed through to an operating system fault handler and the throttling fault stage is ended, otherwise, a delay is implemented for slowing access to the memory.

Abstract: Within a hashed page table maintained by a hypervisor, a special host real address configured to access a hardware device using access data intended to be invalidated is identified as part of a firmware assisted dump process for a virtual machine executing on the hypervisor. The special host real address is translated to a corresponding special guest real address. Within the hashed page table, the special host real address is replaced with the corresponding special guest real address, and the corresponding special guest real address is marked as invalid and requiring special handling. Subsequent to the replacing, the special host real address is invalidated. The special guest real address and translated address information are provided to the virtual machine subsequent to the invalidating, the translated address information comprising a set of host real addresses translated to corresponding guest real addresses.

Abstract: Within a hashed page table maintained by a hypervisor, a special host real address configured to access a hardware device using access data intended to be invalidated is identified as part of a firmware assisted dump process for a virtual machine executing on the hypervisor. The special host real address is translated to a corresponding special guest real address. Within the hashed page table, the special host real address is replaced with the corresponding special guest real address, and the corresponding special guest real address is marked as invalid and requiring special handling. Subsequent to the replacing, the special host real address is invalidated. The special guest real address and translated address information are provided to the virtual machine subsequent to the invalidating, the translated address information comprising a set of host real addresses translated to corresponding guest real addresses.

Abstract: An approach is provided that uses a hypervisor to allocate a shared memory pool amongst a set of partitions (e.g., guest operating systems) being managed by the hypervisor. The hypervisor retrieves memory related metrics from shared data structures stored in a memory, with each of the shared data structures corresponding to a different one of the partitions. The memory related metrics correspond to a usage of the shared memory pool allocated to the corresponding partition. The hypervisor identifies a memory stress associated with each of the partitions with this identification based in part on the memory related metrics retrieved from the shared data structures. The hypervisor then reallocates the shared memory pool amongst the plurality of partitions based on the identified memory stress of the plurality of partitions.

Abstract: Maintaining data integrity for a logical partition by enabling nonintrusive switching of page tables used during a migration of the logical partition from a source computer system to a target computer system. A first page table stores a plurality of page entries made within a logically partitioned environment. A second page table stores one or more page entries generated during the migration. After migration, the processor page table pointer is switched to point to the first page table. A page entry in the second page table corresponding to a page entry made to the first page table by the logical partition may be invalidated in response to a page table hypervisor call made by the logical partition. In parallel, a plurality of entries generated during the migration of the logical partition in the second page table may be read through and invalidated.

Abstract: An apparatus, program product and method in which application program-specified resource allocation and allocation strength preferences are used to allocate hardware resources from a computer for that application program. The resource allocation preference is used to allocate hardware resources for the application program, while the allocation strength preference is used to determine whether to allocate alternate hardware resources when the resource allocation preference specified by the application program cannot be met.

Abstract: An approach is provided that uses a hypervisor to allocate a shared memory pool amongst a set of partitions (e.g., guest operating systems) being managed by the hypervisor. The hypervisor retrieves memory related metrics from shared data structures stored in a memory, with each of the shared data structures corresponding to a different one of the partitions. The memory related metrics correspond to a usage of the shared memory pool allocated to the corresponding partition. The hypervisor identifies a memory stress associated with each of the partitions with this identification based in part on the memory related metrics retrieved from the shared data structures. The hypervisor then reallocates the shared memory pool amongst the plurality of partitions based on the identified memory stress of the plurality of partitions.

Abstract: An apparatus, program product and method in which application program-specified resource allocation and allocation strength preferences are used to allocate hardware resources from a computer for that application program. The resource allocation preference is used to allocate hardware resources for the application program, while the allocation strength preference is used to determine whether to allocate alternate hardware resources when the resource allocation preference specified by the application program cannot be met.

Abstract: A method, apparatus and computer program product are provided for implementing feedback directed deferral on nonessential direct access storage device (DASD) operations. A kernel DASD I/O manager maintains a queue depth count value for a DASD unit and maintains a busy flag that indicates when the queue depth count value is greater than a predefined threshold. The kernel DASD I/O manager defers optional operations responsive to the busy flag being set for the DASD unit.

Abstract: In a computer system that includes multiple nodes and multiple logical partitions, a dynamic partition manager computes current memory affinity and potential memory affinity at the request of a logical partition to help the logical partition determine whether a reallocation of resources between nodes may improve memory affinity for the logical partition. If so, the logical partition requests reallocation of resources by the dynamic partition manager so memory affinity for the logical partition is improved.

Abstract: Disclosed is an apparatus, method, and program product that enables distribution of operating system resources on a nodal basis in the same proportions as the expected system workload. The preferred embodiment of the present invention accomplishes this by assigning various types of weights to each node to represent their proportion of the overall balance within the system. Target Weights represent the desired distribution of the workload based on the existing proportions of processor and memory resources on each node. The actual workload balance on the system is represented by Current Weights, which the operating system strives to keep as close to the Target Weights as possible, on an ongoing basis. When the system is started, operating system services distribute their resources nodally in the same proportions as the Target Weights, and can request to be notified if the Target Weights ever change.

Abstract: A method, apparatus and computer program product are provided for implementing feedback directed deferral on nonessential direct access storage device (DASD) operations. A kernel DASD I/O manager maintains a queue depth count value for a DASD unit and maintains a busy flag that indicates when the queue depth count value is greater than a predefined threshold. The kernel DASD I/O manager defers optional operations responsive to the busy flag being set for the DASD unit.

Abstract: A method, apparatus and computer program product are provided for implementing feedback directed deferral on nonessential direct access storage device (DASD) operations. A kernel DASD I/O manager maintains a queue depth count value for a DASD unit and maintains a busy flag that indicates when the queue depth count value is greater than a predefined threshold. The kernel DASD I/O manager defers optional operations responsive to the busy flag being set for the DASD unit.

Abstract: An apparatus, program product and method maintains data integrity for a logical partition by enabling nonintrusive switching of page tables used during a migration of the logical partition from a source computer system to a target computer system. A first page table may be configured to store a plurality of page entries made within a logically partitioned environment. A second page table may be used during migration to store one or more page entries generated during the migration. After migration, the processor page table pointer may be transparently switched to point to the first page table. A page entry in the second page table corresponding to a page entry made to the first page table by the logical partition may be invalidated in response to a page table hypervisor call made by the logical partition. In parallel, a plurality of entries generated during the migration of the logical partition in the second page table may be read through and invalidated.

Abstract: An apparatus, program product and method in which application program-specified resource allocation and allocation strength preferences are used to allocate hardware resources from a computer for that application program. The resource allocation preference is used to allocate hardware resources for the application program, while the allocation strength preference is used to determine whether to allocate alternate hardware resources when the resource allocation preference specified by the application program cannot be met.

Abstract: Disclosed is an apparatus, method, and program product for observing the nodal workload balance of the system on an ongoing basis, and for dynamically changing the preferred nodes of existing threads in order to improve nodal balance. Workload balance is ascertained on a nodal basis and then thread-based workload information is collected. If the detected imbalance persists, the thread-based information is used to change the assignment of preferred nodes to threads to improve nodal workload balance.

Abstract: An apparatus, program product and method dynamically assign threads to computer resources in a multithreaded computer including a plurality of physical subsystems based upon specific “types” associated with such threads. In particular, thread types are allocated resources that are resident within the same physical subsystem in a computer, such that newly created threads and/or reactivated threads of those particular thread types are dynamically assigned to the resources allocated to their respective thread types. As such, those threads sharing the same type are generally assigned to computer resources that are resident within the same physical subsystem of a computer, which often reduces cross traffic between multiple physical subsystems resident in a computer, and thus improves overall system performance.

Abstract: Mechanism for Assigning Home Nodes to Newly Created Threads Disclosed is an apparatus, method, and program product for associating threads with the processing nodes of a multi-nodal computer system. The assignment is accomplished by considering both the relative work capacity of, and the relative amount of ongoing work assigned to, each node. Initiation Weights are used in the preferred embodiment to reflect the desired proportions of threads assigned to each node, from the standpoint of which node should be chosen when a new thread is created.

Abstract: An apparatus, program product and method in which application program-specified resource allocation and allocation strength preferences are used to allocate hardware resources from a computer for that application program. The resource allocation preference is used to allocate hardware resources for the application program, while the allocation strength preference is used to determine whether to allocate alternate hardware resources when the resource allocation preference specified by the application program cannot be met.

Abstract: A method of handling conflicts between threads, including an initiating thread and at least one other thread, for at least one shared resource in a multi-threaded processing system having a processor and memory includes setting a location in memory for each other thread on the processor with the initiating thread. The initiating thread signals an inter-processor interrupt (IPI) to all other threads on the processor. For each other thread, an interrupt handler is initiated where each other thread: acknowledges receipt of the interrupt, and proceeds to spin on the respective location in memory that was set, thereby guaranteeing that the respective other thread will not be using any shared resource of the processor.