Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: A tamper-evident package includes a flexible web having first and second opposed surfaces, and a tamper-evident layer on at least the first surface. The tamper-evident layer defines a blank space on the web, and includes a first pattern of protected areas and a second pattern of tamper-evident areas. A first semi-rigid outer layer is attached to the first tamper-evident layer so as to adhere only to the tamper-evident areas on the tamper-evident layer, the first semi-rigid outer layer including a transparent portion aligned with the blank space. A second semi-rigid outer layer is attached to the second surface of the web. The blank space may be removed to form a hole in the web, and the second outer layer may include a transparent portion aligned with the hole. A second tamper-evident layer may optionally be provided on the second surface of the web.

Abstract: A tamper-evident package includes a flexible web having first and second opposed surfaces, and a tamper-evident layer on at least the first surface. The tamper-evident layer defines a blank space on the web, and includes a first pattern of protected areas and a second pattern of tamper-evident areas. A first semi-rigid outer layer is attached to the first tamper-evident layer so as to adhere only to the tamper-evident areas on the tamper-evident layer, the first semi-rigid outer layer including a transparent portion aligned with the blank space. A second semi-rigid outer layer is attached to the second surface of the web. The blank space may be removed to form a hole in the web, and the second outer layer may include a transparent portion aligned with the hole. A second tamper-evident layer may optionally be provided on the second surface of the web.

Abstract: A plasma processing apparatus and method to control a temperature of a chamber component therein. A process chamber may include a temperature controlled chamber component and at least one remote heat transfer fluid loop comprising a first heat exchanger having a primary side in fluid communication with a heat sink or heat source, and a local heat transfer fluid loop placing the chamber component in fluid communication with a secondary side of the first heat exchanger. The local loop may be of significantly smaller fluid volume than the remote loop(s) and circulated to provide thermal load of uniform temperature. Temperature control of heat transfer fluid in the local loop and temperature control of the chamber component may be implemented with a cascaded control algorithm.

Abstract: A tunable gas flow equalizer is described. In an embodiment, the tunable flow equalizer includes a gas flow equalizer plate having primary opening and a secondary opening. The primary opening may surround a substrate support, and the secondary opening may be configured with a tuner. In an embodiment, the substrate support may be vertically adjustable with respect to the gas flow equalizer plate. The flow uniformity may be fine tuned by adjusting a tuner configured with a secondary opening in the gas flow equalizer plate and/or by adjusting the height of a vertically positionable substrate support plate having an inwardly tapered skirt 528 with respect to the gas flow equalizer plate 520.

Abstract: A tunable gas flow equalizer is described. In an embodiment, the tunable flow equalizer includes a gas flow equalizer plate having primary opening and a secondary opening. The primary opening may surround a substrate support, and the secondary opening may be configured with a tuner. In an embodiment, the substrate support may be vertically adjustable with respect to the gas flow equalizer plate. The flow uniformity may be fine tuned by adjusting a tuner configured with a secondary opening in the gas flow equalizer plate and/or by adjusting the height of a vertically positionable substrate support plate having an inwardly tapered skirt 528 with respect to the gas flow equalizer plate 520.

Abstract: A method and an apparatus for removing polymer from a substrate are provided. In one embodiment, an apparatus utilized to remove polymer from a substrate includes a processing chamber having a chamber wall and a chamber lid defining a process volume, a substrate support assembly disposed in the processing chamber, and a remote plasma source coupled to the processing chamber through an outlet port formed within the chamber wall, the outlet port having an opening pointing toward an periphery region of a substrate disposed on the substrate support assembly, wherein the remote plasma source is fabricated from a material resistant to hydrogen species.

Abstract: A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

Abstract: Device-enhancing coatings are deposited on CMOS devices by successively masking with photoresist each one of the sets of N-channel and P-channel devices while unmasking or leaving unmasked the other set, and after each step of successively masking one of the sets of devices, carrying out low temperature CVD steps with a toroidal RF plasma current while applying an RF plasma bias voltage. The temperature of the workpiece is held below a threshold photoresist removal temperature. The RF bias voltage is held at a level at which the coating is deposited with a first stress when the unmasked set consists of the P-channel devices and with a second stress when the unmasked set consists of N-channel devices.

Abstract: A plasma immersion ion implantation reactor for implanting a species into a workpiece includes an enclosure which has a side wall and a ceiling defining a chamber, and a workpiece support pedestal within the chamber for supporting a workpiece having a surface layer into which the species are to be ion implanted, the workpiece support pedestal facing an interior surface of the ceiling so as to define therebetween a process region extending generally across the diameter of the wafer support pedestal. The reactor further includes an RF plasma source power generator connected across the ceiling or the sidewall and the workpiece support pedestal for capacitively coupling RF source power into the chamber. A gas distribution apparatus is provided for furnishing process gas into the chamber and a supply of process gas is provided for furnishing to the gas distribution devices a process gas containing the species.

Abstract: An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of said metal pattern layers. Each of the insulating layers is a dielectric material with plural gas bubbles distributed within the volume of the dielectric material to reduce the dielectric constant of the material, the gas bubbles being formed by ion implantation of a gaseous species into the dielectric material.

Abstract: A method of processing a thin film structure on a semiconductor substrate using an optically writable mask, the method includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be exposed to a light source in accordance with a predetermined pattern, depositing an optically writable carbon-containing mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, (c) coupling RF plasma bias power or bias voltage to the workpiece.

Abstract: A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.

Abstract: A method of forming a barrier layer for a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls and depositing a metal barrier layer comprising the barrier metal on the first barrier layer. The method further includes reflowing the metal barrier layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.