Abstract: Photodetectors, methods for use in manufacturing photodetectors, and systems including photodetectors, are described herein. In an embodiment, a photodetector includes a plurality of photodiode regions, at least some of which are covered by an optical filter. A plurality of metal layers are located between the photodiode regions and the optical filter. The metal layers include an uppermost metal layer that is closest to the optical filter and a lowermost metal layer that is closest to the photodiode regions. One or more inter-level dielectric layers separate the metal layers from one another. Each of the metal layers includes one or more metal portions and one or more dielectric portions. The uppermost metal layer is devoid of any metal portions underlying the optical filter.

Abstract: Photodetectors, methods for use in manufacturing photodetectors, and systems including photodetectors, are described herein. In an embodiment, a photodetector includes a plurality of photodiode regions, at least some of which are covered by an optical filter. A plurality of metal layers are located between the photodiode regions and the optical filter. The metal layers include an uppermost metal layer that is closest to the optical filter and a lowermost metal layer that is closest to the photodiode regions. One or more inter-level dielectric layers separate the metal layers from one another. Each of the metal layers includes one or more metal portions and one or more dielectric portions. The uppermost metal layer is devoid of any metal portions underlying the optical filter.

Abstract: A power converter is configured for usage in a power factor correction system. The power converter comprises a transformer with a primary winding and a secondary winding which isolates a primary side from a secondary side. A primary side switch is coupled to the primary winding. An isolator coupled to the primary side switch isolates the primary side from the secondary side and comprises a signal pathway passing a digital signal from the primary side to the secondary side. Power factor correction circuitry is coupled to the primary side switch and adjusts electric load characteristics to improve power factor toward unity.

Abstract: An operational amplifier circuit that provides negative feedback and high gain is described. Specifically, the circuit comprises a first gain stage, a second gain stage, a feedback circuit, and a biasing circuit.

Abstract: High speed data transmission schemes often use differential lines to reduce the effect of noise on the data signal. Unfortunately, the signal propagation on the positive and negative lines may be different, which leads to a signal skew problem. This document describes a novel way of compensating for differential line skew in data transmission lines.

Abstract: The present invention effectively cancels echo, near-end crosstalk and far-end crosstalk. A FEXT canceller is placed at the transmitter rather than at the receiver according to an aspect of the invention. In some embodiment, a FEXT canceller can be placed at the receiver only or the combination of both ends. The FEXT canceller is continuously adapted with information sent back from a remote receiver and with data from a neighbor transmitter that causes the crosstalk at the remote receiver. This allows the FEXT canceller to quickly adapt to a change in crosstalk function or conditions with the surrounding environment, for example, aging, temperature, humidity, physical pressure, etc. In some embodiments, an adaptation control signal is sent back from the receiver to the transmitter by using an overhead bit in the frame format. In some embodiments, part of the FEXT canceller is built-in at the remote receiver.

Abstract: A hybrid system with adjustable on-chip components and a method calibrating the same invariably maximizes hybrid performance despite of on- and off-chip component mismatches and imperfections. The hybrid system has a main DAC, a replica DAC, and three or four resistors. Both DACs are directly connected to digital data. An adjustable resistor is connected to the main DAC and is calibrated such that output impedance is automatically adjusted to match an off-chip load impedance Z. A replica DAC current K is calibrated for optimum DC matching in presence of Z. An adjustable capacitor C2 is calibrated for slope-matching (bandwidth matching). If Z changes, the calibration procedure should be repeated for optimal performance. These three calibration mechanisms can be utilized individually or in combination. The present invention is compatible with both analog and digital echo-cancellers.

Abstract: A biasing technique between a first circuit stage and a second circuit stage is described. Specifically, the technique comprises using a combination of thin and thick oxide transistors.

Abstract: An operational amplifier circuit that provides negative feedback and high gain is described. Specifically, the circuit comprises a first gain stage, a second gain stage, a feedback circuit, and a biasing circuit.

Abstract: A pneumatic tire with a folded belt structure comprises a cut belt and an overlay encompassed by folded over edges of the folded belt. Low aspect ratio tires for high performance automobiles having this structure can be made using a variety of materials.

Abstract: A tire mold has vent pins extending axially into the mold cavity for penetration of the lower sidewall bead area of the tire providing vents in the tire upon opening of the mold.

Abstract: A method and article of manufacture is disclosed describing a technique to make a tire having at least one ply having a geodesic cord path.

Abstract: A method and article of manufacture are disclosed describing a technique to make a tire having at least one ply having a geodesic cord path.

Abstract: Photodetectors, methods for use in manufacturing photodetectors, and systems including photodetectors, are described herein. In an embodiment, a photodetector includes a plurality of photodiode regions, at least some of which are covered by an optical filter. A plurality of metal layers are located between the photodiode regions and the optical filter. The metal layers include an uppermost metal layer that is closest to the optical filter and a lowermost metal layer that is closest to the photodiode regions. One or more inter-level dielectric layers separate the metal layers from one another. Each of the metal layers includes one or more metal portions and one or more dielectric portions. The uppermost metal layer is devoid of any metal portions underlying the optical filter.