Abstract: A direct memory access (DMA) system provides a single context-based DMA engine connected to the memory system. The context-based DMA Engine implements the logic for each DMA function only once, and switches parameter sets as needed to service various DMA requests from different channels. Arbitration is performed at the DMA request level. After a DMA channel is selected for service, the parameters for that channel's transfer are retrieved from a central context block, the data transfer is queued to the memory system, and the parameters are updated and stored back to the central context block. Data paths also are constructed to support context-based transfer, using buffer blocks, to allow the DMA engine and the memory system to access any channel's data through simple addressing of the buffer block. A buffer control unit allows independent flow control between write and read DMA channels accessing the same data, preventing underflow or overflow of data during simultaneous DMA operations.