Abstract: A device for controlling frequency synchronization includes a processor (101) for controlling a phase-controlled clock signal to achieve phase-locking between the phase-controlled clock signal and a reference clock signal, and for controlling a frequency-controlled clock signal so as to achieve frequency-locking between the frequency-controlled clock signal and the reference clock signal. The processor is also configured to monitor a deviation between the frequency- and phase-controlled clock signals, detect a change of circumstances such as temperature changes causing frequency drifting of the frequency-controlled clock signal, and replace or correct the frequency-controlled clock signal with or on the basis of the phase-controlled clock signal when both the monitored deviation and the detected change of circumstances show correlation confirming frequency drift of the frequency-controlled clock signal.

Abstract: A method and arrangement for transferring synchronizing information in a data transmission system includes modem connections. The arrangement includes a modulator (207) arranged to generate an analog signal (222) modulated by synchronizing information, the frequency spectrum of the signal being located in a frequency range that falls outside the data transmission bands of the modem line connected to the network element. The arrangement includes a switching circuit (208) arranged to connect the analog signal to a data transmission cable (206) that forms part of the modem line connected to a network element. The arrangement includes a second switching circuit (209) arranged to receive the analog signal from a data transmission cable that forms part of the modem line connected to the second network element. The arrangement also includes a regenerator (209-arranged to regenerate the synchronizing information from the analog signal.

Abstract: A device for controlling a clock signal generator includes a processor (101) for forming at least two mutually different control quantities on the basis of reception moments of timing messages such as time stamps, where the reception moments are expressed as time values based on a first clock signal and the timing messages are transmitted in accordance with a second clock signal. The processor also calculates a weighted sum of the control quantities, and controls the clock signal generator with the weighted sum so as to synchronize the first clock signal and the second clock signal. The control quantities may represent, for example, a filtered value of observed phase-errors, a phase-error corresponding to a minimum observed transfer delay, and phase-errors corresponding to a given portion of the delay distribution. Using the weighted sum of the mutually different control quantities improves the utilization of the information content of the timing messages.

Abstract: A phase synchronized optical master-slave loop comprises at the slave-end a processor (105) configured to include a first timing signal into a bit stream to be transmitted to the master-end, detect a second timing signal from a bit stream received from the master-end, and calculate a phase difference between a regenerated phase signal and a reference phase signal on the basis of a transmission moment of the first timing signal, a first time-stamp indicating a reception moment of the first timing signal at the master-end, a reception moment of the second timing signal, and a second time-stamp indicating a transmission moment of the second timing signal from the master-end. The processor is configured to read the time stamps from the received bit stream that corresponds to a received light signal according to a reception line-code. Thus, conversion of data format is not necessary for the phase synchronization.

Abstract: A physical data transmission port in a network element of a data network, suited for realizing for instance both an electric packet switched Ethernet connection and an electric time slot switched E1/T1 connection. It has surprisingly been found out that the electric connector (101) and connected circuits provided in the network element can be arranged to support more than one wiring standard. For example the generally used RJ connector can be arranged to support both the RJ45 wiring standard and the RJ48c wiring standard, in which case, with the electric connector (101), there can be realized a physical data transmission port that is suited for realizing both an 10/100 Ethernet connection and an E1/T1 connection.

Abstract: A method and system for adjusting a clock signal in a network element of a data network adjusts the clock signal based on difference values formed by received synchronizing messages. Each difference value is a difference of a reception and transmission values of a received synchronizing message. The reception value depends on a cumulated number of periods of the clock signal at a moment of arrival of the synchronizing message. The transmission value depends on a position of the synchronizing message in a chronological transmission order of synchronizing messages. When adjusting, an adjusting effect of the difference values belonging to a lower part of a margin of fluctuation of the difference values is weighted more heavily than that of an upper part. Thus, for clock signal adjustment, that share of information represented by the received synchronizing messages that has the least interference is used, irrespective of the data network load.

Abstract: The invention relates to determining a quantity to be measured from a communication system, such as a transmission delay or the phase difference of clock times. Measurement messages are transmitted (501, 502) between the two areas of the communication system in both transmission directions. Values of the time difference are calculated (503) for the measurement messages transmitted in at least one of the transmission directions, each of which values is the difference between the instant of reception measured at the reception and the instant of transmission measured at the transmission of the measurement message. The values of the time difference are used to calculate (504) an estimate of the distribution of the time difference, on the basis of which an estimate of the minimum value of the time difference is calculated (504).

Abstract: An arrangement for adjusting a clock signal in a network element of a communications network includes a processor device arranged to produce a control variable containing information about synchronization messages received from at least two other network elements. A situation in which the reception from a sending network element of synchronization messages of a good enough quality ceases will not significantly disturb the clock signal to be adjusted because only part of the control variable used for the adjustment depends on synchronization messages sent by an individual network element. In a preferred arrangement, the reference value of the control variable is changed in response to a situation where the reception from a sending network element of synchronization messages of a good enough quality ceases. Thus it is possible to reduce the change of the difference between the control variable and its reference value which further reduces disturbances caused in the clock signal to be adjusted.

Abstract: The invention relates to producing data traffic where the time intervals between successive data frames follow a predetermined probability distribution. In the present invention, it is surprisingly discovered that a time interval of a desired length between successive data frames can be produced by setting a certain bit quantity of digital stuffing data, defined on the basis of the target length of the time interval target, in a buffer memory (101), where successive data frames are waiting to be transmitted. The digital stuffing data is set in the buffer memory (101), so that the stuffing data is, in the read-out order, located between successive data frames.

Abstract: The invention relates to determining a quantity to be measured from a communication system, such as a transmission delay or the phase difference of clock times. Measurement messages are transmitted (501, 502) between the two areas of the communication system in both transmission directions. Values of the time difference are calculated (503) for the measurement messages transmitted in at least one of the transmission directions, each of which values is the difference between the instant of reception measured at the reception and the instant of transmission measured at the transmission of the measurement message. The values of the time difference are used to calculate (504) an estimate of the distribution of the time difference, on the basis of which an estimate of the minimum value of the time difference is calculated (504).

Abstract: The invention relates to transferring of a time of day value between network elements of a data transfer network. It has been surprisingly detected that the phase reference signals available to various network elements can be utilized in the synchronization of time of day values between these network elements. In the solution according to the invention, a first network element sends to a second network element a difference variable (401, 402, 403) that indicates how much the timing phase of the time of day value maintained in the first network element differs from the timing phase of the phase reference signal available to the first network element. In the second network element that receives the message, an estimate of the time of day value is formed (404, 405) based on the difference variable and the timing phase of the phase reference signal available to the second network element.

Abstract: A physical data transmission port in a network element of a data network, suited for realizing for instance both an electric packet switched Ethernet connection and an electric time slot switched E1/T1 connection. It has surprisingly been found out that the electric connector (101) and connected circuits provided in the network element can be arranged to support more than one wiring standard. For example the generally used RJ connector can be arranged to support both the RJ45 wiring standard and the RJ48c wiring standard, in which case, with the electric connector (101), there can be realized a physical data transmission port that is suited for realizing both an 10/100 Ethernet connection and an E1/T1 connection.

Abstract: The invention relates to a method and arrangement for transferring synchronizing information in a data transmission system including modem connections. The arrangement according to the invention comprises a modulator (207) that is arranged to generate an analog signal (222) modulated by synchronizing information, the frequency spectrum of said signal being located in a frequency range that falls outside the data transmission bands of the modem line connected to the network element. The arrangement includes a switching circuit (208) that is arranged to connect said analog signal to a data transmission cable (206) that forms part of said modem line connected to a network element. The arrangement includes a second switching circuit (209) that is arranged to receive said analog signal from a data transmission cable that forms part of the modem line connected to the second network element.

Abstract: The invention relates to transmitting time information between elements of a data network. In the present invention, it has surprisingly been discovered that in a network transmitting packet, frame or cell switched data traffic, time stamp information can be transmitted from a network element (101) to another network element (102) by using that part (113a, 113c) of the bit stream (111b) to be transmitted which is connected, in the transmitting network element (101), to the transmitted bit stream in a location that is placed, in the flowing direction of the transmitted bit stream, after a transmission buffer (103) buffering data packets, frames or cells. In an arrangement according to the invention, the random-type share of the transmission delay experienced by the time stamp information is slight, because the time stamp information does not have to queue in the transmission buffer (103) buffering data packets, frames or cells.

Abstract: The invention relates to a method and system for adjusting a clock signal placed in a network element of a data network. The clock signal is adjusted on the basis of difference values formed by means of received synchronizing messages. Each difference value is a difference of a reception time value and a transmission value of a received synchronizing message. The reception time value of the synchronizing message depends on a cumulated number of periods of the clock signal at a moment of arrival of the synchronizing message, and the transmission value depends on a position of the synchronizing message in a chronological transmission order of the synchronizing messages. In the adjusting process, an adjusting effect of the difference values belonging to a lower part (304) of a margin of fluctuation (306) of the difference values is weighted more heavily than an adjusting effect of the difference values belonging to an upper part (305) of the margin of fluctuation of the difference values.

Abstract: The invention relates to a method and an arrangement for transferring timing messages in a digital data transfer system. In a solution according to the invention a timing message is transferred (101, 102, 103) within control data carried in a protocol data unit. The timing message is dependent on a transmission moment of the protocol data unit from a network element of the digital data transfer system. The control data is either a synchronization status message (Ethernet-SSM) carried in an Ethernet-frame, an overhead (OH) of a Synchronous Optical Network-frame (SONET), or an overhead (OH) of a Synchronous Digital Hierarchy-frame (SDH). Therefore, the number of such protocol data units that are dedicated only for timing purposes can be reduced.

Abstract: The invention relates to producing data traffic where the time intervals between successive data frames follow a predetermined probability distribution. In the present invention, it is surprisingly discovered that a time interval of a desired length between successive data frames can be produced by setting a certain bit quantity of digital stuffing data, defined on the basis of the target length of the time interval target, in a buffer memory (101), where successive data frames are waiting to be transmitted. The digital stuffing data is set in the buffer memory (101), so that the stuffing data is, in the read-out order, located between successive data frames.