Abstract: A leadless cardiac pacemaker comprises a housing, a plurality of electrodes coupled to an outer surface of the housing, and a pulse delivery system hermetically contained within the housing and electrically coupled to the electrode plurality, the pulse delivery system configured for sourcing energy internal to the housing, generating and delivering electrical pulses to the electrode plurality. The pacemaker further comprises an anti-unscrewing feature disposed on either a fixation device of the pacemaker or on the housing itself. The anti-unscrewing feature can be configured to prevent the fixation device from disengaging the wall of the heart.

Abstract: A leadless cardiac pacemaker is provided which can include any number of features. In one embodiment, the pacemaker can include a tip electrode, pacing electronics disposed on a p-type substrate in an electronics housing, the pacing electronics being electrically connected to the tip electrode, an energy source disposed in a cell housing, the energy source comprising a negative terminal electrically connected to the cell housing and a positive terminal electrically connected to the pacing electronics, wherein the pacing electronics are configured to drive the tip electrode negative with respect to the cell housing during a stimulation pulse. The pacemaker advantageously allows p-type pacing electronics to drive a tip electrode negative with respect to the can electrode when the can electrode is directly connected to a negative terminal of the cell. Methods of use are also provided.

Abstract: A leadless cardiac pacemaker comprises a hermetic housing, a power source disposed in the housing, at least two electrodes supported by the housing, a semiconductor temperature sensor disposed in the housing, and a controller disposed in the housing and configured to deliver energy from the power source to the electrodes to stimulate the heart based upon temperature information from the temperature sensor. In some embodiments, the sensor can be configured to sense temperature information within a predetermined range of less than 20 degrees C. The temperature sensor can be disposed in the housing but not bonded to the housing.

Abstract: A leadless cardiac pacemaker comprises a housing, a plurality of electrodes coupled to an outer surface of the housing, and a pulse delivery system hermetically contained within the housing and electrically coupled to the electrode plurality, the pulse delivery system configured for sourcing energy internal to the housing, generating and delivering electrical pulses to the electrode plurality. The pacemaker further comprises an anti-unscrewing feature disposed on either a fixation device of the pacemaker or on the housing itself. The anti-unscrewing feature can be configured to prevent the fixation device from disengaging the wall of the heart.

Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage. These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.

Abstract: A circuit and method for amplifying a differential input signal over a wide dynamic range using multiple signal gains such that, over a predetermined range of values of the differential input signal, a ratio of the differential output signal to the differential input signal varies in relation to a continuous combination of the multiple signal gains.

Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.

Abstract: A circuit and method for amplifying a differential input signal over a wide dynamic range using multiple signal gains such that, over a predetermined range of values of the differential input signal, a ratio of the differential output signal to the differential input signal varies in relation to a continuous combination of the multiple signal gains.

Abstract: The circuit has an output stage comprising a current source and a current sink. The circuit also has a comparison stage operable to compare a current mirrored from the current source with a current mirrored from the current sink to determine a difference therebetween. The mirrored currents may be a fraction of their corresponding output currents. Moreover, the fractions may be different from each other. A first current boost stage in the circuit is operable to provide a controlled current boost to the output stage if the difference between the compared currents crosses a threshold. The current boost may be a current sink boost or a current source boost.

Abstract: A frequency compensation device for providing added compensation to an operational amplifier, such as a bipolar or MOS rail-to-rail output operational amplifier, when the output device of the operational amplifier is in saturation. The device comprises a detector circuit for detecting those conditions which can cause the output device to go into saturation. When saturation is detected, an auxiliary frequency compensation device provides added frequency. Thereby, in a normal mode of operation, the op-amp is not overcompensated. Yet, when an output device becomes saturated, the auxiliary compensation is added to improve stability and prevent the op-amp from becoming oscillatory.

Abstract: A high voltage operational amplifier input stage utilizes a pair of low voltage p-type MOSFET input devices configured to operate at a common mode voltage. The input stage operates between positive and negative voltage supply rails. Common mode bipolar transistor feedback loops force drains of the MOSFETs to track corresponding source potentials. MOSFET substrate connections are maintained at a predetermined level above (or below, depending on the power supply sensing arrangement) the common mode voltage of the input stage to ensure power supply sensing capability. The input stage has a common mode range which includes the supply rail potential, and which tolerates a total supply voltage that exceeds the MOSFET breakdown voltage. The effective threshold voltage of the input devices is increased above the nominal threshold value to sustain the linear operation of the input stage.

Abstract: A digitally controlled trim circuit which includes a plurality of resistors connected in series between a circuit node and a reference voltage, a plurality of first solid-state switches (e.g., PMOS transistors) connected in series across respective ones of the resistors, a plurality of multiplexers each having an output coupled to the gate electrode of a respective one of the first switches, a plurality of first control lines coupled to a first input of respective ones of the multiplexers, a plurality of second control lines coupled to a second input of respective ones of the multiplexers, and a plurality of fuses coupled to respective ones of the first control lines. The trim circuit is operable in a trim test mode in response to a first logic level of a select control signal coupled to the select input of each of the multiplexers, and is operable in a fuse-program mode in response to a second logic level of the select control signal.

Abstract: In a power supply circuit supplying a high voltage charger of an implantable cardioverter-defibrillator (ICD), a changer circuit switches the power source of the power supply circuit between a battery and an output signal of a step-up converter. The signal derived from the boost winding rises to a high voltage when the high voltage charger charges the storage capacitors of the ICD. A system current measurement circuit can be provided in the power supply circuit.

Abstract: A high voltage charger operates in a three-phase cycle. In a first phase, the high voltage charger operates at a fixed frequency. In a second phase, the high voltage charger operates at a variable frequency designed to draw a substantially constant average current from a power source. In the third phase, the high voltage charger returns to fixed frequency operation. The variable frequency is the reciprocal of the sum of an on-time and an off-time of the switch. In one embodiment, the on-time is provided by the time required for the switch to reach a predetermined maximum and the off-time is provided by the time over which a magnetic field in a transformer collapses.

Abstract: A switched capacitor circuit that uses more than one switch in parallel. The control signals of each switch are turned off in sequence, giving an induced offset voltage in the final case due only to the last turned off switch, but with a capacitor charge or acquisition time due to the parallel combinations of all of the switches. An alternative switch capacitor circuit uses a bootstrapped gatedrive control signal. The gatedrive control signal initially assumes a high value resulting in a low switch resistance and, thus, a fast capacitor charge or acquisition time followed by a reduction in voltage to the normal "digital" level until turn off. The resultant induced offset voltage is the same as that due to a simple minimum sized switch.

Abstract: An implantable medical device includes electrodes coupled to a patient's heart and sensing circuitry having inputs connected to the electrodes for sensing analog cardiac electrical signals from one of the atrial or ventricular channels. The sensing circuitry includes waveform digitization network means for converting the analog atrial or ventricular electrical signals into a parallel output format sign/magnitude digitized output signal.

Abstract: An implantable cardiac defibrillator employing a switched capacitor filter stage having charge steering resistors connected in series with corresponding switched capacitors that are coupled to a sensitive node of an operational amplifier. The stored channel charges in associated switches when they are tuned off are directed away from the sensitive node. The switches associated with the switched capacitors are operated by control signals having a generally trapezoidal shaped waveform so as to slowly turn off the same, thereby reducing clock feedthrough and charge injection induced offset voltage on the output of the operational amplifier.

Abstract: An implantable medical device includes electrodes coupled to a patient's heart and sensing circuitry having inputs connected to the electrodes for sensing cardiac electrical signals. The sensing circuitry includes a digital waveform analyzer system which performs direct analysis of digitized ECG heart signals from the atrial and/or ventricular channels. This eliminates the need for the system microprocessor to perform direct analysis on raw ECG data. The benefit being that complex software algorithms are not required, saving microprocessor memory space. System current drain is also reduced since the microprocessor need not be active during every ECG sample.

Abstract: An implantable cardiac defibrillator employing a switched capacitor filter stage having charge steering resistors connected in series with corresponding switched capacitors that are coupled to a sensitive node of an operational amplifier. The stored channel charges in associated switches when they are turned off are directed away from the sensitive node. The switches associated with the switched capacitors are operated by control signals having a generally trapezoidal shaped waveform so as to slowly turn off the same, thereby reducing clock feedthrough and charge injection induced offset voltage on the output of the operational amplifier.

Abstract: An implantable cardiac defibrillator includes electrodes coupled to a patient's heart, a sensing system having inputs connected to the electrodes for sensing cardiac electrical signals from the atrial and/or ventricular channels, means for storing a charge, and means for delivering a shock to the heart. The sensing system includes switched capacitor means for amplifying the cardiac electrical signal with non-binary gain changing steps.