Patents by Inventor Kenneth J. Danti

Kenneth J. Danti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for verifying design rule checks
    Patent number: 9934349
    Abstract: A method for design rule verification is provided. The method comprises: providing a design rule check (DRC) deck based on a design rule manual (DRM) having a plurality of design rules; providing a plurality of primitive objects; creating a plurality of collection objects, each collection object using one or more primitive objects; using the plurality of collection objects, creating a plurality of DRM test cases; assigning names to each of the plurality of DRM test cases, each of the names based on a rule name of the plurality of design rules and on an expected pass or fail indication; and using the plurality of named DRM test cases to verify the DRC deck.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: April 3, 2018
    Assignee: NXP USA, INC.
    Inventors: Inder Mohan Bhawnani, Ertugrul Demircan, Dwarka Prasad, Douglas M. Reber, Donald E. Smeltzer, Kenneth J. Danti
  • METHOD FOR VERIFYING DESIGN RULE CHECKS
    Publication number: 20160283642
    Abstract: A method for design rule verification is provided. The method comprises: providing a design rule check (DRC) deck based on a design rule manual (DRM) having a plurality of design rules; providing a plurality of primitive objects; creating a plurality of collection objects, each collection object using one or more primitive objects; using the plurality of collection objects, creating a plurality of DRM test cases; assigning names to each of the plurality of DRM test cases, each of the names based on a rule name of the plurality of design rules and on an expected pass or fail indication; and using the plurality of named DRM test cases to verify the DRC deck.
    Type: Application
    Filed: March 26, 2015
    Publication date: September 29, 2016
    Inventors: INDER MOHAN BHAWNANI, ERTUGRUL DEMIRCAN, DWARKA PRASAD, DOUGLAS M. REBER, DONALD E. SMELTZER, KENNETH J. DANTI
  • Prioritized design for manufacturing virtualization with design rule checking filtering
    Patent number: 9026970
    Abstract: An approach is provided to generate a number of virtualized circuit designs by applying design-for-manufacturing (DFM) processes to a circuit design. The virtualized circuit designs are checked using design rule checks (DRCs), with the checking resulting in a design rule error quantity that corresponds to each of the virtualized circuit designs. One of the virtualized circuit designs is selected for use in manufacturing the circuit design with the selection based each of the design's design rule error quantities.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: May 5, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kenneth J. Danti, Ertugrul Demircan
  • Prioritized Design for Manufacturing Virtualization with Design Rule Checking Filtering
    Publication number: 20140258951
    Abstract: An approach is provided to generate a number of virtualized circuit designs by applying design-for-manufacturing (DFM) processes to a circuit design. The virtualized circuit designs are checked using design rule checks (DRCs), with the checking resulting in a design rule error quantity that corresponds to each of the virtualized circuit designs. One of the virtualized circuit designs is selected for use in manufacturing the circuit design with the selection based each of the design's design rule error quantities.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 11, 2014
    Inventors: Kenneth J. Danti, Ertugrul Demircan