Abstract: An apparatus including a handshake window enabler having a pair of differential inputs and a window enablement output, a common mode detector coupled to a power input and a ground input and having a handshake inhibit output, and a handshake disabler coupled to the handshake window enabler, the common mode detector, and the pair of differential inputs. If a common mode voltage that out of range (“too high”) is detected, high speed handshake protocols are such that the bus operates a lower data rate.

Abstract: An apparatus including a handshake window enabler having a pair of differential inputs and a window enablement output, a common mode detector coupled to a power input and a ground input and having a handshake inhibit output, and a handshake disabler coupled to the handshake window enabler, the common mode detector, and the pair of differential inputs. If a common mode voltage that out of range (“too high”) is detected, high speed handshake protocols are such that the bus operates a lower data rate.

Abstract: An apparatus including a handshake window enabler having a pair of differential inputs and a window enablement output, a common mode detector coupled to a power input and a ground input and having a handshake inhibit output, and a handshake disabler coupled to the handshake window enabler, the common mode detector, and the pair of differential inputs. If a common mode voltage that out of range (“too high”) is detected, high speed handshake protocols are such that the bus operates a lower data rate.

Abstract: A method for providing power through a USB port of an electronic device includes connecting a power supply to a USB port of an electronic device, emulating a personal computer (PC) host system such that the electronic device believes that the power supply is a PC host system, retrieving at least one descriptor from the electronic device, identifying the electronic device from the at least one descriptor, and setting a charging voltage based upon the identity of the electronic device.

Abstract: An apparatus including a handshake window enabler having a pair of differential inputs and a window enablement output, a common mode detector coupled to a power input and a ground input and having a handshake inhibit output, and a handshake disabler coupled to the handshake window enabler, the common mode detector, and the pair of differential inputs. If a common mode voltage that out of range (“too high”) is detected, high speed handshake protocols are such that the bus operates a lower data rate.

Abstract: A method for providing power through a USB port of an electronic device includes connecting a power supply to a USB port of an electronic device, emulating a personal computer (PC) host system such that the electronic device believes that the power supply is a PC host system, retrieving at least one descriptor from the electronic device, identifying the electronic device from the at least one descriptor, and setting a charging voltage based upon the identity of the electronic device.

Abstract: In an embodiment, set forth by way of example and not limitation a USB power converter for an electronic device includes a USB bus including VBUS power line, a D? data line and a D+ data line, a variable voltage converter, a processor clock, a USB transceiver coupled to the D? data line and the D+ data line, and a processor coupled to processor clock and to the USB transceiver. Preferably, the variable voltage converter has an alternating current (AC) input, a direct current (DC) output coupled to the VBUS power line, and a voltage control input responsive to a voltage control signal to provide a plurality of voltage levels at the DC output. The process is, in this example embodiment, operative to develop the control signal based upon communication from an electronic device connected to the USB bus.

Abstract: A horizontal deflection circuit couples flyback pulses from a first transformer winding to a second transformer winding. The second winding is coupled to a source of unregulated DC voltage. A switch has input, output and control terminals. The output terminal is coupled to the first winding. The switch operates with a variable duty cycle for generating a regulated DC voltage at the output terminal. An inductor and a diode are coupled to the second winding. The inductor is also coupled to the input terminal. A pulse width modulator varies the duty cycle of the switch responsive to feedback and timing signals. Drive voltage for the control terminal is supplied by a first capacitor charged during retrace intervals and a second capacitor charged at the end of the retrace intervals by the first capacitor. The second capacitor is coupled to the control terminal and the drive voltage is discharged by the pulse width modulator.

Abstract: A free running frequency alignment method in a video display having a sync generator comprising a first oscillator having a first frequency and a second oscillator having a second frequency. The first oscillator is phase modulated by the second oscillator which has a free running frequency different from a standard frequency. The free running frequency of the first oscillator is to be controllably aligned to the standard frequency by a method comprising the steps of applying a frequency determining initial control value to the first oscillator and measuring an average free running frequency responsive to the initial control value. An absolute difference frequency is calculated between the average frequency and the standard frequency. The absolute difference frequency is tested for a frequency value less than a predetermined value which signifies an aligned condition. If the difference frequency is less than the predetermined value the alignment is complete.

Abstract: A deflection apparatus comprises a deflection amplifier coupled to a deflection waveform modulation circuit such as a diode modulator. A source for generating a modulation signal. The modulation signal comprises a symmetrical periodic AC component having equal first and second portions of a trace period. A feedback amplifier alters the amplitude of a first portion of the trace period relative to a second portion of the trace period to render the AC component asymmetrical. The asymmetrical AC component is coupled to the deflection waveform modulation circuit for deflection waveform modulation.

Abstract: A video display has microcomputer control via a data bus and comprises a first sync generator coupled to the data bus for control by data thereon. A second sync generator is without controllable coupling to the data bus. A deflection amplifier is coupled to a deflection coil for generating a deflection current therein. A circuit for controlling the second sync generator is coupled to the first sync generator and is responsive to a digitally controlled signal therefrom. The second generator output signal is coupled to the deflection amplifier for deflection generation responsive to the digitally controlled signal.

Abstract: A scanning waveform generator for operation at a first or a second scanning frequency comprises a source of a parabolic shaped signal having a frequency selectable between the first or second scanning frequency. A means for generating a switching signal indicative of a video signal operating at one of a first or a second scanning frequency. A means for generating a sawtooth shaped waveform is coupled to the switching signal for switching between the first or the second scanning frequency. A means for generating an S correction signal is coupled to the source and to the sawtooth generating means. A means for filtering the parabolic signal is controllably coupled to the switching signal generator, and is also coupled to the S correction signal generating means. The filtered parabolic signal has an substantially the same shape during the first or second scanning frequency.

Abstract: A deflection apparatus comprises a deflection amplifier coupled to a deflection waveform modulation circuit such as a diode modulator. A source for generating a modulation signal. The modulation signal comprises an AC component and a DC component, each having levels which define an amplitude ratio. An amplifier alters the amplitude ratio, and the altered amplitude ratio signal is coupled to the deflection waveform modulation circuit for deflection waveform modulation.