Patents by Inventor Kenneth John Evans

Kenneth John Evans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wide frequency range clock generation with phase interpolation
    Patent number: 10298240
    Abstract: In certain embodiments, an apparatus may comprise a circuit configured to scale a phase control value from an external phase control resolution of an external clock frequency to an internal phase control resolution of an internal clock frequency to generate a target phase control value. The circuit may also determine a difference between a current phase control value and the target phase control value and determine a phase step value based on the difference. Further, the circuit may modify a current phase control value based on the phase step value and generate a phase controlled clock signal at the internal clock frequency using the modified phase control value. Additionally, the circuit may divide the phase controlled clock signal at the internal clock frequency to generate a phase controlled clock signal at the external clock frequency.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventors: Marcus Marrow, Kenneth John Evans, Jason Vincent Bellorado
  • Wide frequency range clock generation with phase interpolation
    Patent number: 9954537
    Abstract: In certain embodiments, an apparatus may comprise a circuit configured to scale a phase control value from an external phase control resolution of an external clock frequency to an internal phase control resolution of an internal clock frequency to generate a target phase control value. The circuit may also determine a difference between a current phase control value and the target phase control value and determine a phase step value based on the difference. Further, the circuit may modify a current phase control value based on the phase step value and generate a phase controlled clock signal at the internal clock frequency using the modified phase control value. Additionally, the circuit may divide the phase controlled clock signal at the internal clock frequency to generate a phase controlled clock signal at the external clock frequency.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: April 24, 2018
    Assignee: Seagate Technology LLC
    Inventors: Marcus Marrow, Kenneth John Evans, Jason Vincent Bellorado