Patents by Inventor Kenneth Klapproth

Kenneth Klapproth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11221794
    Abstract: Methods, systems and computer program products for providing access to a spare memory array element (“MAE”) are provided. Aspects include storing a row number a column number associated with a defective MAE of a plurality of MAEs. The plurality of MAEs are logically arranged in a plurality of rows and a plurality of columns. Aspects also include receiving a command to access a cache line. The cache line corresponds to a selected row of MAEs of the plurality of MAEs. Responsive to determining that the selected row matches the row number that is associated with the defective MAE, aspects include activating one or more column shifters to prevent access to the defective MAE and provide access to a spare MAE when accessing the cache line. The activation of the one of more column shifters is based on the column number that is associated with the defective MAE.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: January 11, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tim Bronson, Hieu T. Huynh, Kenneth Klapproth
  • Patent number: 10915461
    Abstract: Embodiments of the present invention are directed to a computer-implemented method for cache eviction. The method includes detecting a first data in a shared cache and a first cache in response to a request by a first processor. The first data is determined to have a mid-level cache eviction priority. A request is detected from a second processor for a same first data as requested by the first processor. However, in this instance, the second processor has indicated that the same first data has a low-level cache eviction priority. The first data is duplicated and loaded to a second cache, however, the data has a low-level cache eviction priority at the second cache.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: February 9, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ekaterina M. Ambroladze, Robert J. Sonnelitter, III, Matthias Klein, Craig Walters, Kevin Lopes, Michael A. Blake, Tim Bronson, Kenneth Klapproth, Vesselina Papazova, Hieu T Huynh
  • Patent number: 10802966
    Abstract: Provided are systems, methods, and media for simultaneous, non-atomic request processing of snooped operations of a broadcast scope within a SMP system. An example method includes detecting, by a first controller, based on a set of coherency resolution conditions, whether there are coherency resolution problems between two snooped operations. The method includes in response to detecting, by the first controller, that coherency resolution problems will not result, transmitting, from the first controller to a second controller, an indication signal indicating that coherency resolution problems will not result from the operation. The set of coherency resolution conditions includes: (a) detecting that a second operation of the two snooped operations operation is of a predetermined type, (b) detecting at time of snooping of the second operation that a directory state does not allow for exclusive data, and (c) detecting that the first controller has started committing to an update.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: October 13, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arun Iyengar, Tim Bronson, Michael Andrew Blake, Vesselina Papazova, Arthur o'Neill, Jason D Kohl, Kenneth Klapproth
  • Publication number: 20200285592
    Abstract: Embodiments of the present invention are directed to a computer-implemented method for cache eviction. The method includes detecting a first data in a shared cache and a first cache in response to a request by a first processor. The first data is determined to have a mid-level cache eviction priority. A request is detected from a second processor for a same first data as requested by the first processor. However, in this instance, the second processor has indicated that the same first data has a low-level cache eviction priority. The first data is duplicated and loaded to a second cache, however, the data has a low-level cache eviction priority at the second cache.
    Type: Application
    Filed: March 5, 2019
    Publication date: September 10, 2020
    Inventors: Ekaterina M. Ambroladze, Robert J. Sonnelitter, III, Matthias Klein, Craig Walters, Kevin Lopes, Michael A. Blake, Tim Bronson, Kenneth Klapproth, Vesselina Papazova, Hieu T Huynh
  • Publication number: 20200264803
    Abstract: Methods, systems and computer program products for providing access to a spare memory array element (“MAE”) are provided. Aspects include storing a row number a column number associated with a defective MAE of a plurality of MAEs. The plurality of MAEs are logically arranged in a plurality of rows and a plurality of columns. Aspects also include receiving a command to access a cache line. The cache line corresponds to a selected row of MAEs of the plurality of MAEs. Responsive to determining that the selected row matches the row number that is associated with the defective MAE, aspects include activating one or more column shifters to prevent access to the defective MAE and provide access to a spare MAE when accessing the cache line. The activation of the one of more column shifters is based on the column number that is associated with the defective MAE.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Inventors: Tim Bronson, Hieu T. Huynh, Kenneth Klapproth
  • Publication number: 20200264977
    Abstract: Provided are systems, methods, and media for simultaneous, non-atomic request processing of snooped operations of a broadcast scope within a SMP system. An example method includes detecting, by a first controller, based on a set of coherency resolution conditions, whether there are coherency resolution problems between two snooped operations. The method includes in response to detecting, by the first controller, that coherency resolution problems will not result, transmitting, from the first controller to a second controller, an indication signal indicating that coherency resolution problems will not result from the operation. The set of coherency resolution conditions includes: (a) detecting that a second operation of the two snooped operations operation is of a predetermined type, (b) detecting at time of snooping of the second operation that a directory state does not allow for exclusive data, and (c) detecting that the first controller has started committing to an update.
    Type: Application
    Filed: February 14, 2019
    Publication date: August 20, 2020
    Inventors: Arun Iyengar, Tim Bronson, Michael Andrew Blake, Vesselina Papazova, Arthur O'Neill, Jason D. Kohl1, Kenneth Klapproth