Abstract: Apparatus and methods are disclosed, such as those involving protection of a semiconductor junction of a semiconductor device. One such apparatus includes a bipolar transistor including an emitter, a base, and a collector; a first junction protection device including a first end electrically coupled to the emitter of the bipolar transistor, and a second end electrically coupled to a node; and a second junction protection device including a first end electrically coupled to a voltage reference, and a second electrically coupled to the emitter of the bipolar transistor. Each of the first and second junction protection devices may have a substantially higher leakage current than the leakage current of the base-emitter junction of the bipolar transistor when reverse biased.

Abstract: Apparatus and methods are disclosed, such as those involving protection of a semiconductor junction of a semiconductor device. One such apparatus includes a bipolar transistor including an emitter, a base, and a collector; a first junction protection device including a first end electrically coupled to the emitter of the bipolar transistor, and a second end electrically coupled to a node; and a second junction protection device including a first end electrically coupled to a voltage reference, and a second electrically coupled to the emitter of the bipolar transistor. Each of the first and second junction protection devices may have a substantially higher leakage current than the leakage current of the base-emitter junction of the bipolar transistor when reverse biased.

Abstract: Disclosed is a differential amplifier system that maintains high speed characteristics of the differential amplifier while providing stability from a common-mode loop by using dominant pole compensation. The disclosed system includes a first and second transconductance stage, a circuit having high impedance, and a compensation circuit.

Abstract: A balanced, differential, cross-coupled amplifier including an input stage for receiving a differential input and including an input transconductance differential pair and a feedback transconductance differential pair; and an output stage responsive to the input stage for providing a differential output; the differential input being connected to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair, the differential output being fed back to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair for balancing the currents in the transconductance differential pairs over the input range.

Abstract: Disclosed is a differential amplifier system that maintains high speed characteristics of the differential amplifier while providing stability from a common-mode loop by using dominant pole compensation. The disclosed system includes a first and second transconductance stage, a circuit having high impedance, and a compensation circuit.

Abstract: A balanced, differential, cross-coupled amplifier including an input stage for receiving a differential input and including an input transconductance differential pair and a feedback transconductance differential pair; and an output stage responsive to the input stage for providing a differential output; the differential input being connected to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair, the differential output being fed back to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair for balancing the currents in the transconductance differential pairs over the input range.

Abstract: A non-inverting feedback amplifier with high disabled impedance includes a disableable signal amplifier; a feedback network having an input node, a feedback node and a reference node; the signal amplifier having a first input for receiving an input signal and a second input for receiving a feedback signal from the feedback node; and a reference buffer including a reference amplifier with its output directly connected to the reference node without additional series switching elements, a first input connected to a reference voltage, and a second input connected to its own output for mirroring at its output the reference voltage at its first input when the reference buffer and signal amplifier are enabled and presenting a high impedance between the feedback network and the reference voltage when the signal amplifier and reference buffer are disabled.