Patents by Inventor Kenneth M. Curewitz
Kenneth M. Curewitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136015Abstract: Associative processing memory (APM) may be used to align reads to a reference sequence. The APM may store shifted permutations and/or other permutations of the reference sequence. A read may be compared to some or all of the permutations of the reference sequence and the APM may provide an output for each comparison. In some examples, the APM may compare the read to many permutations of the reference sequence to the read in parallel. Inferences may be made based on the comparisons between the read and the portions and/or permutations of a reference sequence. Based on the inferences, a candidate alignment location in the reference sequence for a read to be determined.Type: ApplicationFiled: October 24, 2022Publication date: April 25, 2024Applicant: MICRON TECHNOLOGY, INC.Inventors: Justin Eno, Sean S. Eilert, Ameen D. Akel, Kenneth M. Curewitz
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Publication number: 20240136016Abstract: Associative processing memory (APM) may be used to align reads to a reference sequence. The APM may store shifted permutations and/or other permutations of the reference sequence. A read may be compared to some or all of the permutations of the reference sequence and the APM may provide an output for each comparison. In some examples, the APM may compare the read to many permutations of the reference sequence to the read in parallel. Inferences may be made based on the comparisons between the read and the portions and/or permutations of a reference sequence. Based on the inferences, a candidate alignment location in the reference sequence for a read to be determined.Type: ApplicationFiled: October 24, 2022Publication date: April 25, 2024Applicant: MICRON TECHNOLOGY, INC.Inventors: Justin Eno, Sean S. Eilert, Ameen D. Akel, Kenneth M. Curewitz
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Publication number: 20240125851Abstract: A memory controller and a physical interface layer may accommodate multiple memory types. In some examples, the memory controller and/or PHY may include a register that includes operating parameters for multiple operating modes. Different operating modes may be compatible with different memory types. In some examples, the memory controller and physical interface may be included in a system for testing multiple memory types. The system may provide multiple interfaces for communicating with the memory. The different communication types may be used for performing different tests and/or simulating different types of devices that may utilize the memory.Type: ApplicationFiled: October 18, 2022Publication date: April 18, 2024Applicant: Micron Technology, Inc.Inventors: Kenneth M. Curewitz, Jaime Cummins, John D. Porter, Bryce D. Cook, Jeffrey P. Wright
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Publication number: 20240086100Abstract: A memory device may be used to implement a Bloom filter. In some examples, the memory device may include a memory array to perform a multiply-accumulate operation to implement the Bloom filter. The memory device may store multiple portions of a reference genetic sequence in the memory array and compare the portions of the reference genetic sequence to a read sequence in parallel by performing the multiply-accumulate operation. The results of the multiply-accumulate operation between the read sequence and the portions of the reference genetic sequence may be used to determine where the read sequence aligns to the reference sequence.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Applicant: MICRON TECHNOLOGY, INC.Inventors: Justin Eno, Sean S. Eilert, Ameen D. Akel, Kenneth M. Curewitz
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Publication number: 20240087643Abstract: A memory device may be used to implement a Bloom filter. In some examples, the memory device may include a memory array to perform a multiply-accumulate operation to implement the Bloom filter. The memory device may store multiple portions of a reference genetic sequence in the memory array and compare the portions of the reference genetic sequence to a read sequence in parallel by performing the multiply-accumulate operation. The results of the multiply-accumulate operation between the read sequence and the portions of the reference genetic sequence may be used to determine where the read sequence aligns to the reference sequence.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Applicant: MICRON TECHNOLOGY, INC.Inventors: Justin Eno, Sean S. Eilert, Ameen D. Akel, Kenneth M. Curewitz
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Patent number: 11899961Abstract: Methods, systems, and devices for redundant computing across planes are described. A device may perform a computational operation on first data that is stored in a first plane that includes content-addressable memory cells. The first data may be representative of a set of contiguous bits of a vector. The device may perform, concurrent with performing the computational operation on the first data, the computational operation on second data that is stored in a second plane. The second data may be representative of the set of contiguous bits of the vector. The device may read from the first plane and write to the second plane, third data representative of a result of the computational operation on the first data.Type: GrantFiled: February 23, 2022Date of Patent: February 13, 2024Assignee: Micron Technology, Inc.Inventors: Sean S. Eilert, Kenneth M. Curewitz, Helena Caminal, Ameen D. Akel
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Publication number: 20230214148Abstract: Methods, systems, and devices for redundant computing across planes are described. A device may perform a computational operation on first data that is stored in a first plane that includes content-addressable memory cells. The first data may be representative of a set of contiguous bits of a vector. The device may perform, concurrent with performing the computational operation on the first data, the computational operation on second data that is stored in a second plane. The second data may be representative of the set of contiguous bits of the vector. The device may read from the first plane and write to the second plane, third data representative of a result of the computational operation on the first data.Type: ApplicationFiled: February 23, 2022Publication date: July 6, 2023Inventors: Sean S. Eilert, Kenneth M. Curewitz, Helena Caminal, Ameen D. Akel
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Patent number: 10778815Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.Type: GrantFiled: May 25, 2018Date of Patent: September 15, 2020Assignee: Micron Technology, Inc.Inventors: Kenneth M Curewitz, Sean Eilert, Ameen D. Akel, Hongyu Wang
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Patent number: 10761781Abstract: Apparatuses and methods for a distributed memory system including memory nodes are disclosed. An example apparatus includes a processor and a memory system coupled to the processor. The memory system is configured to receive instructions from the processor to access information stored by the memory system. The memory system includes a plurality of memory nodes, wherein each memory node of the plurality of memory nodes is coupled to at least one other memory node of the plurality of memory nodes, and each memory node of the plurality of memory nodes is configured to generate an internal message including instructions for an operation, the internal message to be provided to another memory node of the plurality of memory nodes to perform the operation.Type: GrantFiled: September 14, 2018Date of Patent: September 1, 2020Assignee: Micron Technology, Inc.Inventors: Kenneth M. Curewitz, Sean E. Eilert
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Publication number: 20190042100Abstract: Apparatuses and methods for a distributed memory system including memory nodes are disclosed. An example apparatus includes a processor and a memory system coupled to the processor. The memory system is configured to receive instructions from the processor to access information stored by the memory system. The memory system includes a plurality of memory nodes, wherein each memory node of the plurality of memory nodes is coupled to at least one other memory node of the plurality of memory nodes, and each memory node of the plurality of memory nodes is configured to generate an internal message including instructions for an operation, the internal message to be provided to another memory node of the plurality of memory nodes to perform the operation.Type: ApplicationFiled: September 14, 2018Publication date: February 7, 2019Applicant: MICRON TECHNOLOGY, INC.Inventors: Kenneth M. Curewitz, Sean E. Eilert
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Publication number: 20190007529Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.Type: ApplicationFiled: May 25, 2018Publication date: January 3, 2019Inventors: Kenneth M. Curewitz, Sean Eilert, Ameen D. Akel, Hongyu Wang
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Patent number: 10089043Abstract: Apparatuses and methods for a distributed memory system including memory nodes are disclosed. An example apparatus includes a processor and a memory system coupled to the processor. The memory system is configured to receive instructions from the processor to access information stored by the memory system. The memory system includes a plurality of memory nodes, wherein each memory node of the plurality of memory nodes is coupled to at least one other memory node of the plurality of memory nodes, and each memory node of the plurality of memory nodes is configured to generate an internal message including instructions for an operation, the internal message to be provided to another memory node of the plurality of memory nodes to perform the operation.Type: GrantFiled: March 15, 2013Date of Patent: October 2, 2018Assignee: Micron Technology, Inc.Inventors: Kenneth M. Curewitz, Sean S. Eilert
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Patent number: 10003675Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.Type: GrantFiled: December 2, 2013Date of Patent: June 19, 2018Assignee: Micron Technology, Inc.Inventors: Kenneth M Curewitz, Sean Eilert, Ameen D. Akel, Hongyu Wang
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Publication number: 20170351737Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.Type: ApplicationFiled: August 24, 2017Publication date: December 7, 2017Inventors: Kenneth M. Curewitz, Sean Eilert, Hongyu Wang, Ameen D. Akel
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Patent number: 9779138Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.Type: GrantFiled: August 13, 2013Date of Patent: October 3, 2017Assignee: Micron Technology, Inc.Inventors: Kenneth M Curewitz, Sean Eilert, Hongyu Wang, Ameen D. Akel
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Publication number: 20150153963Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.Type: ApplicationFiled: December 2, 2013Publication date: June 4, 2015Applicant: Micron Technology, Inc.Inventors: Kenneth M Curewitz, Sean Eilert, Ameen D. Akel, Hongyu Wang
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Publication number: 20150052114Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.Type: ApplicationFiled: August 13, 2013Publication date: February 19, 2015Applicant: Micron Technology, Inc.Inventors: Kenneth M. Curewitz, Sean Eilert, Hongyu Wang, Ameen D. Akel
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Publication number: 20140281278Abstract: Apparatuses and methods for a distributed memory system including memory nodes are disclosed. An example apparatus includes a processor and a memory system coupled to the processor. The memory system is configured to receive instructions from the processor to access information stored by the memory system. The memory system includes a plurality of memory nodes, wherein each memory node of the plurality of memory nodes is coupled to at least one other memory node of the plurality of memory nodes, and each memory node of the plurality of memory nodes is configured to generate an internal message including instructions for an operation, the internal message to be provided to another memory node of the plurality of memory nodes to perform the operation.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: Kenneth M. Curewitz, Sean S. Eilert
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Patent number: 5485609Abstract: Online prediction techniques based on data compression principles are employed to make predictions in restricted memory environments. Predictors have data structures in the form of trees that are paged and maintained in a cache on a least recently used replacement basis. A fast sequence of events strategy increments the counts for events at the current node of the predictor.Type: GrantFiled: May 20, 1994Date of Patent: January 16, 1996Assignee: Brown University Research FoundationInventors: Jeffrey S. Vitter, Kenneth M. Curewitz, P. Krishnan