Abstract: A chip package for reduced EMI. In one embodiment, a chip package includes a semiconductor chip mounted on a substrate. First and second horizontal conductors may be present within the substrate. The semiconductor chip is coupled to the first and second horizontal conductors by a first and second pluralities of vertical conductors, respectively. The silicon chip may receive power via the first horizontal conductor and the first plurality of vertical conductors. The first and second horizontal conductors are connected to external connectors by third and fourth pluralities of vertical conductors, respectively. One or more capacitors may be electrically coupled between the first and second horizontal conductors.