Patents by Inventor Kenneth N. Burgin

Kenneth N. Burgin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5202847
    Abstract: Digital signal processing circuitry for calculating separable two dimensional linear transforms on blocks of data elements includes two processors coupled as a linear pipeline. Each processor carries out a one dimensional linear transform effecting multiplication of transform coefficients by repeated addition in a carry save adder network to form a plurality of inner products. The two processors may effect simultaneously different transforms on respective blocks of data.
    Type: Grant
    Filed: July 31, 1990
    Date of Patent: April 13, 1993
    Assignee: Inmos Limited
    Inventors: John P. Bolton, Kenneth N. Burgin
  • Patent number: 5162796
    Abstract: A multi-stage adder has a plurality of parallel inputs some fed to one stage of the adder and other inputs fed to a next stage of the adder. To effect selective inversion of a pair of inputs one of the pair is connected to one stage and the other of the pair is connected to the next stage. A cross-over switch is provided on both inputs so that their connection to the two successive stages can be interchanged.
    Type: Grant
    Filed: July 31, 1990
    Date of Patent: November 10, 1992
    Assignee: INMOS Limited
    Inventors: Martin J. P. Bolton, Kenneth N. Burgin
  • Patent number: 5051620
    Abstract: In a CMOS logic circuit an output node is controlled by a plurality of transistors of a first type and precharged by a precharging transistor of a second type. Clock pulses of alternate first and second levels are supplied to the precharging transistor. The first level switches the precharging transistor on to precharge the output node while the second level substantially switches off the precharging transistor but not completely so as to leave a small current flow through the precharging transistor.
    Type: Grant
    Filed: July 31, 1990
    Date of Patent: September 24, 1991
    Inventor: Kenneth N. Burgin
  • Patent number: 4515996
    Abstract: A telephone speech circuit includes an integrated circuit (5) powered by the exchange battery via the subscriber's line. The speech circuit includes an earpiece amplifier (25) and a microphone amplifier (26) whose gains are controlled as a function of the length of the subscriber's line. The voltage on pin 7 which is dependent on the line current and hence the line length is compared with a reference voltage on pin 8 which is derived from the forward voltage drop of a diode connected to pin 8 (FIG. 1). A voltage representative of that on pin 7 is derived from a d.c. level shift circuit (27) and applied to the input of an amplifier (28). The reference voltage on pin 8 is applied to the input of an amplifier (29). The outputs of the amplifiers (28) and (29) are compared in a comparator (30) whose output is coupled to gain control inputs of the amplifier (28), the microphone amplifier (26) and the earpiece amplifier (25).FIG. 2.
    Type: Grant
    Filed: July 15, 1983
    Date of Patent: May 7, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Kenneth N. Burgin
  • Patent number: 4506114
    Abstract: A telephone speech and signalling circuit includes an integrated circuit powered by the exchange battery through the subscriber's line. The power supply for the integrated circuit is maintained during short duration line breaks caused by operations within the exchange by the charge on a capacitor which is charged from the exchange battery through the collector-emitter path of a first transistor when the subscriber's line is looped. The driving current for the first transistor is supplied by a second transistor. The integrated circuit compares the line voltage with the voltage across the capacitor, and reduces the driving current for the second transistor when the line voltage falls below the capacitor voltage. This reduces the driving current for the first transistor, reducing its conductivity to a level which prevents significant discharge of the capacitor but nevertheless allows line voltage to be discharged through the two transistors.
    Type: Grant
    Filed: July 18, 1983
    Date of Patent: March 19, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Kenneth N. Burgin