Patents by Inventor Kenneth O

Kenneth O has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060017113
    Abstract: A composite MOS transistor (100) includes a first MOS sub-transistor (105) having a first gate dielectric thickness (106), and a second MOS sub-transistor (155) in series connection with the first MOS sub-transistor having a second gate dielectric thickness (107). The second gate dielectric thickness (107) is substantially thicker than the first gate dielectric thickness (106) preferably being at least 50% thicker. Composite MOS transistors generally provide a breakdown voltage (Vds) approaching that of the second MOS sub-transistor (155) and a threshold voltage, transconductance and drive current all approaching that of the first MOS sub-transistor (105), such as being within 20%, and preferably within 10%, of the reference parameter. A level shifting circuit includes first and at least a second drive transistor, wherein the drive transistors are composite MOS transistors.
    Type: Application
    Filed: July 21, 2005
    Publication date: January 26, 2006
    Applicant: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Haifeng Xu, Kenneth O
  • Patent number: 6940322
    Abstract: A high speed CMOS phase locked loop (PLL) (10) includes a three-state phase detection circuit having a frequency phase detector (12) coupled to a charge pump (14) for monitoring the phase differences between a reference frequency signal and a divided output frequency signal. The PLL can further include a loop filter (16)coupled to the three-state phase detection circuit, a VCO (18) coupled to the output of the loop filter, a VCO buffer (22) coupled to the output of the VCO for providing an output frequency signal, and a dual modulus prescaler (28) having a synchronous counter (27 and 29) using feedback among D flip-flops (30 and 32) for generating the divided output frequency signal.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: September 6, 2005
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Dong-Jun Yang, Kenneth O
  • Patent number: 6842144
    Abstract: An integrated circuit for wireless communications includes substrate, at least one integrated antenna formed in or on the substrate, and a heat sink. At least one dielectric propagating layer is disposed between the integrated antenna and the heat sink which provides a thermal conductivity of at least 35 W/m·K and resistivity greater than 100 Ohm-cm at 25 C. The invention can be used to establish an on-chip or inter-chip wireless link over at least a 2.2 cm distance.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: January 11, 2005
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Xiaoling Guo, Kenneth O, Ran Li