Abstract: In vacuum sputter cleaning and plating operations forming a patterned metallic layer on a silicon semiconductor chip, alignment is maintained by anticipating the difference in thermal expansion between the molybdenum mask and the silicon chip and forming the apertures in the molybdenum mask in a radially offset position with respect to the intended cleaning and deposition locations on the semiconductor chip, when the mask and the chip are at room temperature. Then, when the mask and the silicon chip are maintained in a concentric position and are raised to the cleaning and deposition temperature, the differential expansion of the molybdenum mask will bring the apertures therein into perfect alignment with the intended deposition locations on the silicon wafer.

Abstract: An electrical package for Large Scale Integrated (LSI) devices includes a carrier having (a) thermal expansion similar to a semiconductor, (b) a standard array of terminal pins (100 or more) and (c) a circuit transposer that is (i) a semiconductor material, typically silicon and (ii) readily personalized to connect any combination of attached LSI devices to the input-output terminal pins. The package utilizes solder technology to interconnect the carrier, circuit transposer and LSI devices. The carrier and semiconductor transposer eliminate mechanical stress on the solder joints that would otherwise occur from thermal coefficient expansion (TCE) mismatch between dissimilar package materials. The circuit transposer increases the wirability of electrical packages utilizing solder technology. Reliability problems presented by thick film paste or metallized conductors on carriers are also overcome by the semiconductor circuit transposer.