Abstract: A system and method are provided for presenting a centralized display that allows a user to quickly and easily manage user or application initiated sync operations for multiple devices. The invention may also provide a layered sync display, in which each layer presents a user with successively more information, including information about the event that occurred during the sync operations. The layered sync display ensures that a user is not presented with extraneous information, which simplifies management of the sync operations and allows user to perform other tasks during the sync operations. In implementations of the present invention, the sync operations may occur without user input, so that the user may continue working on other tasks while a sync operation takes place. The user may elect to enter input, to resolve conflicts, for instance, or other input requested by the sync operation, later when that is convenient for the user.

Abstract: A twisting fixture probe for cleaning oxides, residues or other contaminants from the surface of a solder bead probe and probing a solder bead probe on a printed circuit board during in-circuit testing.

Abstract: A method for testing for a defect condition on a node-under-implicit-test of an electrical device is presented. The technique according to the invention includes stimulating a first node of the electrical device that is capacitively coupled to the node-under-implicit-test with a known source signal, and capacitively sensing a signal on a second node of the electrical device that is capacitively coupled to the node-under-implicit-test. A defect condition such as a short or open can be determined from the capacitively sensed signal.

Abstract: Techniques for automating probing location selection during printed circuit board (PCB) and corresponding PCB tester fixture design are presented. The invention includes a system and algorithm for selecting a probe layout comprising a set of probing locations for a printed circuit board design having a plurality of nets, at least some of which have a number of alternative possible probing locations. The system and algorithm iteratively generates a potential probe layout comprising one or more probing locations per net, and based on the potential probe layout, determines one or more regions of maximum deflection. A probing location from the potential probe layout that is located in a region of maximum deflection and is associated with a net having one or more alternative probing locations is removed from the potential probe layout and replaced in the with one of the one or more alternate probing locations associated with the net.

Abstract: Techniques for automating test pad insertion in a printed circuit board (PCB) design and fixture probe insertion in a PCB tester fixture are presented. A probe location algorithm predictably determines respective preferred probing locations from among respective sets of potential probing locations associated with a number of respective nets in a PCB design. Test pads, preferably in the form of bead probes, are added to the PCB design at the respective preferred probing locations along with, where feasible, one or more alternate probing locations chosen from among remaining ones of the respective sets of potential probing locations. During fixture design, nets with multiple test pads implemented in the PCB design are processed by the same probe location algorithm used during PCB design to determine the associated preferred and alternate probing locations for said respective nets.

Abstract: Techniques for automating test pad insertion in a printed circuit board (PCB) design and fixture probes insertion in a PCB tester fixture are presented. A probe location algorithm predictably determines respective preferred probing locations from among respective sets of potential probing locations associated with a number of respective nets in a PCB design. Test pads, preferably in the form of bead probes, are added to the PCB design at the respective preferred probing locations along with, where feasible, one or more alternate probing locations chosen from among remaining ones of the respective sets of potential probing locations. During fixture design, nets with multiple test pads implemented in the PCB design are processed by the same probe location algorithm used during PCB design to determine the associated preferred probing location and any associated alternate probing locations for said respective nets.

Abstract: A twisting fixture probe for cleaning oxides, residues or other contaminants from the surface of a solder bead probe and probing a solder bead probe on a printed circuit board during in-circuit testing.

Abstract: A method and apparatus for detecting shorts between accessible and inaccessible signal nodes (e.g., integrated circuit pins) of an electrical device (e.g., an integrated circuit), using capacitive lead frame technology is presented. In accordance with the method of the invention, an accessible node under test is stimulated with a known source signal. A capacitive sense plate is capacitively coupled to at least one of the accessible node and inaccessible node of the electrical device, and a measuring device coupled to the capacitive sense plate capacitively senses a signal present on the at least one of the accessible node and inaccessible node of the electrical device. Based on the value of the capacitively sensed signal, a known expected “defect-free” capacitively sensed signal measurement and/or a known expected “shorted” capacitively sensed signal measurement, one can determine whether a short fault exists between the accessible node and inaccessible node of the electrical device.

Abstract: A method and apparatus for a wiping fixture probe for cleaning oxides, residues or other contaminants from the surface of a solder bead probe and probing a solder bead probe on a printed circuit board during in-circuit testing.

Abstract: A test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. Each test access point structure is conductively connected to a trace at a test access point and above an exposed surface of the printed circuit board to be accessible for probing by a fixture probe. The test access point structure may be designed and manufactured to permit deformation of the test access point structure upon initial probing of the test access point structure with a fixture probe to ensure electrical contact between the fixture probe and the test access point structure.

Abstract: A layout independent test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. Each test access point structure is conductively connected to various locations along a trace at a test access point and above an exposed surface of the printed circuit board to be accessible for probing by a fixture probe.

Abstract: A device for enabling testing electrical paths through an area array package of a circuit assembly is presented. The device may include a measurement access target on the area array package, wherein the measurement access target is connected to fill metal in the signal routing layers of the area array package. A method for testing continuity of electrical paths through an area array package of a circuit assembly is presented. In the method, one or more nodes of the circuit assembly are stimulated; a test probe is coupled to a measurement access target on the area array, where the measurement access target is connected to fill metal in the signal routing layers of the area array package; and an electrical characteristic is measured by a tester coupled to the test probe to determine continuity of electrical paths through the area array of the circuit assembly.

Abstract: A platesetting system and apparatus for providing computer-to-plate electrophotographic printing to a conductive plate. The apparatus may include an electrophotographic printer adapted to include an electrically isolated media path for receiving a conductive plate. A conductive plate may include anodized and grained aluminum (AL) that does not include a light sensitive emulsion layer in a finished product. The plate may be adapted to include rounded corners. The plate may be adapted to include a protective leading edge. The plate may be fused using the absorbed light of a radiant heat source.

Abstract: In one embodiment, a method for testing continuity of electrical paths through a circuit assembly includes: 1) mating a test-facilitating circuit package to a connector of the circuit assembly; the circuit package having a plurality of contacts for mating to a plurality of contacts of the connector; the circuit package containing incomplete or no mission circuitry for the circuit assembly, but containing a plurality of passive circuit components coupled in parallel between the package's plurality of contacts and a test sensor port of the circuit package; 2) stimulating one or more nodes of the circuit assembly; 3) measuring an electrical characteristic of the circuit package; and 4) comparing the measured electrical characteristic to at least one threshold to assess continuities of at least two electrical paths through the circuit assembly. Other embodiments are also disclosed.

Abstract: A device for enabling testing of electrical paths through a circuit assembly is presented. The device may include a non-contact connector test probe for a testing a connector of the circuit assembly. A method for testing continuity of electrical paths through a circuit assembly is presented. In the method, one or more nodes of the circuit assembly are stimulated, connector pins of a connector on the circuit assembly are capacitively coupled to a non-contact connector test probe, and an electrical characteristic is measured by a tester coupled to the non-contact connector test probe to determine continuity of electrical paths through the circuit assembly.

Abstract: A device for enabling testing of electrical paths through a circuit assembly is presented. The device may include a test facilitating shipping and handling cover for a socket of the circuit assembly. The test facilitating shipping and handling cover may have a conductive layer for capacitively coupling to an array of pins in the socket during testing. A method for testing continuity of electrical paths through a circuit assembly is presented. In the method, one or more nodes of the circuit assembly are stimulated, contacts of a socket on the circuit assembly are capacitively coupled with a conductive layer of a shipping and handling cover mated with the socket, and an electrical characteristic is measured by a tester coupled to the shipping and handling cover to determine continuity of electrical paths through the circuit assembly.

Abstract: A solenoid operated valve has first flux collector, bobbin with coil and an armature assembled onto a valve body with a tubular housing received over the body and first portions of the housing, in the form of tabs, deformed over the bobbin flange to retain the assembly. A second flux collector with adjustable pole price is then assembled adjacent the bobbin and retained in place by deformation of second portions of the housing. The pole piece is accessible exteriorly for adjustment through the end of the housing.

Abstract: A lead frame has slots therein for bayonet type connection to electrical terminals provided on a solenoid valve or group of valves. Projections on the lead frame are disposed between the slots and upon bayonet connection to the terminals closely interfit a web disposed between the terminals on the solenoid. Preferably, support stanchions are provided for the terminals and may be integrally molded with the web.

Abstract: In a method for testing continuity of electrical paths through a connector, pairs of contacts of the connector are coupled via a first plurality of passive circuit components. The contacts are also coupled to a test sensor port via a second plurality of passive circuit components, ones of which are coupled in parallel to the test sensor port. The method proceeds with stimulating one or more nodes of the connector, and then measuring an electrical characteristic via the test sensor port. Finally, the measured electrical characteristic is compared to at least one threshold to assess continuities of at least two electrical paths through the connector.

Abstract: A device for testing continuity of electrical paths through a connector of a circuit assembly has a package containing incomplete or no mission circuitry for the circuit assembly. The package is provided with a plurality of contacts for mating to a plurality of contacts of the connector. A test sensor port is integrated with the package. A plurality of passive circuit components are integrated with the package, ones of which are coupled in parallel between ones of the contacts on the package and the test sensor port.