Abstract: An I/O interface provides multiple serial data lines each with an embedded clock to provide sufficient data handling capacity to accommodate high data rates that are associated with high-speed data converters.

Abstract: A method for calibrating time interleaved samplers comprising applying a calibration signal to a time-interleaved sampling device, wherein the signal is coherent with at least one sample clock on the device and is periodic and has a predetermined spectral content and frequency, sampling, by said time-interleaved sampling device, the calibration signal at a plurality of phases to form samples, averaging the formed samples, and calculating the phase error of each sample based on the average calibration signal sample.

Abstract: The present method reduces variations in noise and temperature in a mixed-signal circuit including memory. Memory electrically proximate an analog circuit is provided and a digital data word received at the memory. When the data word is not a desired data word, a dummy write to the memory is performed. When the data word is a desired data word, the data word is written to the memory. The mixed-signal circuit includes an analog circuit, memory electrically proximate to the analog circuit and connected to receive digital data words, and a memory controller connected to the memory. The memory controller is operable to cause the memory to write to the memory each of the data words that is a desired data word and additionally to perform a dummy write to memory for each of the data words that is not a desired data word.