Patents by Inventor Kenneth Prygon

Kenneth Prygon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7569268
    Abstract: The polishing pad is suitable for planarizing at least one of semiconductor, optical and magnetic substrates. The polishing pad has an ultimate tensile strength of at least 3,000 psi (20.7 MPa) and polymeric matrix containing closed cell pores. The closed cell pores have an average diameter of 1 to 50 ?m and represent 1 to 40 volume percent of the polishing pad. The pad texture has an exponential decay constant, ?, of 1 to 10 ?m as a result of the natural porosity of the polymeric matrix and a surface texture developed by implementing periodic or continuous conditioning with an abrasive. The surface texture has a characteristic half height half width, W1/2 that is less than or equal to the value of ?.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: August 4, 2009
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: T. Todd Crkvenac, Clyde A. Fawcett, Mary Jo Kulp, Andrew Scott Lawing, Kenneth A. Prygon
  • Publication number: 20080182492
    Abstract: The polishing pad is suitable for planarizing at least one of semiconductor, optical and magnetic substrates. The polishing pad has an ultimate tensile strength of at least 3,000 psi (20.7 MPa) and polymeric matrix containing closed cell pores. The closed cell pores have an average diameter of 1 to 50 ?m and represent 1 to 40 volume percent of the polishing pad. The pad texture has an exponential decay constant, ?, of 1 to 10 ?m as a result of the natural porosity of the polymeric matrix and a surface texture developed by implementing periodic or continuous conditioning with an abrasive. The surface texture has a characteristic half height half width, W1/2 that is less than or equal to the value of ?.
    Type: Application
    Filed: January 29, 2007
    Publication date: July 31, 2008
    Inventors: T. Todd Crkvenac, Clyde A. Fawcett, Mary Jo Kulp, Andrew Scott Lawing, Kenneth A. Prygon
  • Patent number: 6899602
    Abstract: A porous polishing pad is useful for polishing semiconductor substrates. The porous polishing pad has a porous matrix formed from a coagulated polyurethane and a non-fibrous polishing layer. The non-fibrous polishing layer has a polishing surface with a pore count of at least 500 pores per mm2 that decreases with removal of the polishing layer; and the polishing surface has a surface roughness Ra between 0.01 and 3 ?m.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: May 31, 2005
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, NC
    Inventors: Clyde A. Fawcett, T. Todd Crkvenac, Kenneth A. Prygon, Bernard Foster
  • Publication number: 20050026552
    Abstract: A porous polishing pad is useful for polishing semiconductor substrates. The porous polishing pad has a porous matrix formed from a coagulated polyurethane and a non-fibrous polishing layer. The non-fibrous polishing layer has a polishing surface with a pore count of at least 500 pores per mm2 that decreases with removal of the polishing layer; and the polishing surface has a surface roughness Ra between 0.01 and 3 ?m.
    Type: Application
    Filed: July 30, 2003
    Publication date: February 3, 2005
    Inventors: Clyde Fawcett, T. Crkvenac, Kenneth Prygon, Bernard Foster