Abstract: PICA probe system apparatus is described, including apparatus for calibrating an event timer having a coarse measurement capability in which time intervals defined by clock boundaries are counted and a fine measurement capability in which time between boundaries is interpolated using a voltage ramp.

Abstract: A single-photon detector includes a superconductor strip biased near its critical current. The superconductor strip provides a discernible output signal upon absorption of a single incident photon. In one example, the superconductor is a strip of NbN (niobium nitride). In another example, the superconductor strip meanders to increase its probability of receiving a photon from a light source. The single-photon detector is suitable for a variety of applications including free-space and satellite communications, quantum communications, quantum cryptography, weak luminescence, and semiconductor device testing.

Abstract: A method and system of testing integrated circuits (IC) via optical coupling. The optical system includes an optical fiber, fixture and focusing element. In addition, channels are provided in the fixture mounted on the integrated circuit to accommodate the optical system. The fixture acts as a heat sink. As such, one or more photosensitive elements/targets on the integrated circuit are probed using light that is brought to a focus on each target site. The light causes latching of data into the integrated circuit (which is operating under influence of a test program) and formation of a test pattern output from the integrated circuit that is used to confirm proper functioning of the IC.

Abstract: A method and system of testing integrated circuits (IC) via optical coupling. The optical system includes an optical fiber, fixture and focussing element. In addition, channels are provided in the fixture mounted on the integrated circuit to accommodate the optical system. The fixture acts as a heat sink. As such, one or more photosensitive elements/targets on the integrated circuit are probed using light that is brought to a focus on each target site. The light causes latching of data into the integrated circuit (which is operating under influence of a test program) and formation of a test pattern output from the integrated circuit that is used to confirm proper functioning of the IC.

Abstract: A method and apparatus for laser-assisted fault mapping which synchronizes the laser control with the tester unit. The inventive method provides for laser-assisted pseudo-static fault mapping to localize defects in a device whose inputs are being stimulated dynamically by a tester. It further provides for laser-assisted dynamic soft error mapping, to localize in terms of location and to correlate with respect to a specific test vector, sensitive areas in a device by utilizing device performance criteria such as pass-fail status outputs. The apparatus includes a fully controllable dynamic laser stimulation apparatus connected to a control unit that provides complete synchronization with a tester unit.

Abstract: A system and method for determining precisely in-situ the endpoint of halogen-assisted charged particle beam milling of a hole or trench in the backside of the substrate of a flipchip packaged IC. The backside of the IC is mechanically thinned. Optionally, a coarse trench is then milled in the thinned backside of the IC using either laser chemical etching or halogen-assisted charged particle beam milling. A further small trench is milled using a halogen-assisted charged-particle beam (electron or ion beam). The endpoint for milling this small trench is determined precisely by monitoring the power supply leakage current of the IC induced by electron-hole pairs created by the milling process. A precise in-situ endpoint detection signal is generated by modulating the beam at a reference frequency and then amplifying that frequency component in the power supply leakage current with an amplifier, narrow-band amplifier or lock-in amplifier.

Abstract: PICA probe system methods and apparatus are described, including methods and apparatus for calibrating an event timer having a coarse measurement capability in which time intervals defined by clock boundaries are counted and a fine measurement capability in which time between boundaries is interpolated using a voltage ramp.

Abstract: A single photon detector includes a superconductor strip biased near its critical current. The superconductor strip provides a discernible output signal upon absorption of a single incident photon. In one example, the superconductor is a strip of NbN (niobium nitride). In another example, the superconductor strip meanders to increase its probability of receiving a photon from a light source. The single-photon detector is suitable for a variety of applications including free-space and satellite communications, quantum communications, quantum cryptography, weak luminescence, and semiconductor device testing.

Abstract: A method of probing voltage comprises: establishing electrical connectivity between a conductor to be probed and a first terminal of a photoconductive switch; during a sampling interval n, applying a laser pulse to the photoconductive switch while applying a voltage to a second terminal of the photoconductive switch corresponding to a voltage sample taken during a prior sampling interval n−1, such that current flow through the photoconductive switch is dependent on any difference between voltage of the conductor and the applied voltage; converting the current flow to a voltage signal; passing the voltage signal during a gating interval and sampling the passed voltage signal to produce a voltage sample for the sampling interval n. A repetitive test pattern applied to the conductor and the sampling interval is synchronized with the repetitive test pattern.

Abstract: PICA probe system methods and apparatus are described, including methods and apparatus for calibrating an event timer having a coarse measurement capability in which time intervals defined by clock boundaries are counted and a fine measurement capability in which time between boundaries is interpolated using a voltage ramp.

Abstract: A system and method for determining precisely in-situ the endpoint of halogen-assisted charged particle beam milling of a hole or trench in the backside of the substrate of a flipchip packaged IC. The backside of the IC is mechanically thinned. Optionally, a coarse trench is then milled in the thinned backside of the IC using either laser chemical etching or halogen-assisted charged particle beam milling. A further small trench is milled using a halogen-assisted charged-particle beam (electron or ion beam). The endpoint for milling this small trench is determined precisely by monitoring the power supply leakage current of the IC induced by electron-hole pairs created by the milling process. A precise in-situ endpoint detection signal is generated by modulating the beam at a reference frequency and then amplifying that frequency component in the power supply leakage current with an amplifier, narrow-band amplifier or lock-in amplifier.

Abstract: A method of probing voltage comprises: establishing electrical connectivity between a conductor to be probed and a first terminal of a photoconductive switch; during a sampling interval n, applying a laser pulse to the photoconductive switch while applying a voltage to a second terminal of the photoconductive switch corresponding to a voltage sample taken during a prior sampling interval n−1, such that current flow through the photoconductive switch is dependent on any difference between voltage of the conductor and the applied voltage; converting the current flow to a voltage signal; passing the voltage signal during a gating interval; and sampling the passed voltage signal to produce a voltage sample for the sampling interval n. A repetitive test pattern applied to the conductor and the sampling interval is synchronized with the repetitive test pattern.

Abstract: Method and on chip circuitry for testing integrated circuits, for instance, flip chip integrated circuits. Provided on the integrated circuit in addition to the conventional circuitry is additional circuitry including a photosensitive element such as a photodiode, the output terminal of which is connected via a Schmidt trigger to the clock terminal of an on-chip flip-flop. The node of the integrated circuit to be tested, for instance, the output terminal of a logic gate, is connected to the D input terminal of the same flip-flop. Hence, light incident on the photosensitive element clocks the flip-flop, allowing sampling of the state of the output signal from the logic gate. Advantageously, the photodiode need not be a specially made structure but in one version is the conventional PN junction provided by, e.g., the drain of a standard CMOS transistor.

Abstract: Optical interferometery is used to probe an integrated circuit device under test (DUT). During each cycle of a repetitive electrical test pattern applied to the DUT a reference pulse is provided at a fixed time relative to the test pattern, and a probe pulse is provided at a time scanned through the test pattern in the manner of equivalent time sampling. The probe and reference light pulses are each split to provide at least a second probe pulse and a second reference pulse. One probe pulse and one reference pulse interact with the DUT at the same physical location, but at displaced times with respect to each other. The second probe pulse and the second reference pulse travel an optical delay path with length controlled to compensate for motions of the DUT. The probe pulses are recombined and detected to provide a probe interference signal. The reference pulses are recombined and detected to provide a reference interference signal.

Abstract: A method and system of testing integrated circuits (IC) via optical coupling. The optical system includes an optical fiber, fixture and focussing element. In addition, channels are provided in the fixture mounted on the integrated circuit to accommodate the optical system. The fixture acts as a heat sink. As such, one or more photosensitive elements/targets on the integrated circuit are probed using light that is brought to a focus on each target site. The light causes latching of data into the integrated circuit (which is operating under influence of a test program) and formation of a test pattern output from the integrated circuit that is used to confirm proper functioning of the IC.

Abstract: A system and process for determining precisely in-situ the endpoint of halogen-assisted charged particle beam milling of a hole or trench in the backside of the substrate of a flipchip packaged IC. The backside of the IC is mechanically thinned. Optionally, a coarse trench is then milled in the thinned backside of the IC using either laser chemical etching or halogen-assisted charged particle beam milling. A further small trench is milled using a halogen-assisted charged-particle beam (electron or ion beam). The endpoint for milling this small trench is determined precisely by monitoring the power supply leakage current of the IC induced by electron-hole pairs created by the milling process. A precise in-situ endpoint detection signal is generated by pulsing the beam at a reference frequency and then amplifying that frequency component in the power supply leakage current with an amplifier, narrow-band amplifier or lock-in amplifier.

Abstract: A probe beam is used to sample the waveform on an IC device under test (DUT) during each cycle of a test pattern applied to the DUT. A reference laser beam is also used to sample the DUT. For each cycle of the test pattern, the reference and probe beams sample the DUT at the same physical location, but at displaced times with respect to each other. Each reference measurement is made at a fixed time relative to the test pattern while the probe measurements are scanned through the test-pattern time portion of interest, in the manner normal to equivalent time sampling, to reconstruct the waveform. For each test cycle, the ratio of these two measurements is taken. The fluctuations of these ratios due to noise is greatly reduced as compared to fluctuations of the probe measurements taken alone. Thus, a smaller number of averages is required to reconstruct the waveform.

Abstract: The invention is a termination circuit which may be used to terminate a tester end of a transmission line between the tester and a digital device under test (DUT). The termination circuit is a clamp circuit which acts as a non-linear resistor of infinite resistance for termination voltages between zero volts (or low logic level voltage) and the power supply voltage V.sub.cc (or high logic level voltage) of the DUT, and which provides a substantially constant slope resistance set to equal the characteristic impedance (Z.sub.O) of the transmission line for voltages outside this range. Given that the output impedance of the DUT is less than the characteristic impedance Z.sub.O of a transmission line, and given the characteristics of the clamp circuit, all reflections on the transmission line as a result of unmatched impedances are totally eliminated by the clamp in twice the delay time of the transmission line. After the reflections are eliminated, the clamp acts as an open circuit.

Abstract: An electron-beam test probe system (400) in which a pulsed laser-beam source (404) and a photocathode assembly (430) are used with an electron-beam column (426) to produce a pulsed electron beam at a stabilized repetition frequency. A pulse picker (414) allows the pulse repetition frequency of the pulsed electron beam to be reduced to a submultiple of the pulsed laser repetition frequency. A test pattern generator (416) is programmable to apply a desired pattern of test vector patterns to an electronic circuit to be probed, the test vector patterns being synchronized with the stabilized laser-beam pulse repetition frequency. A timebase circuit (412) allows the test vector patterns to be time-shifted relative to the pulsed electron beam. The electronic circuit under test can thus be probed at any desired point in the applied test vector pattern by control of the pulse picker and by time-shifting the test vector pattern.