Patents by Inventor Kenneth Richard Surdyk

Kenneth Richard Surdyk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Read spike mitigation in integrated circuit memory
    Patent number: 11587614
    Abstract: An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: February 21, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Josephine Tiu Hamada, Kenneth Richard Surdyk, Lingming Yang, Mingdong Cui
  • Read Spike Mitigation in Integrated Circuit Memory
    Publication number: 20210366540
    Abstract: An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire.
    Type: Application
    Filed: August 5, 2021
    Publication date: November 25, 2021
    Inventors: Josephine Tiu Hamada, Kenneth Richard Surdyk, Lingming Yang, Mingdong Cui
  • Read spike mitigation in integrated circuit memory
    Patent number: 11114156
    Abstract: An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: September 7, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Josephine Tiu Hamada, Kenneth Richard Surdyk, Lingming Yang, Mingdong Cui
  • Read Spike Mitigation in Integrated Circuit Memory
    Publication number: 20210118497
    Abstract: An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire.
    Type: Application
    Filed: October 22, 2019
    Publication date: April 22, 2021
    Inventors: Josephine Tiu Hamada, Kenneth Richard Surdyk, Lingming Yang, Mingdong Cui