Patents by Inventor Kenneth Rush
Kenneth Rush has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10978876Abstract: Controlling an energy storage system includes accessing monitored sensor data and component data, if the DC bus voltage is less than the renewable energy power module (REPM) output voltage then selecting battery modules in combination with a power-network inverter to source power to the bus, else if greater than the REPM voltage then selecting battery modules in combination with the inverter to sink power from the bus, instructing respective control processors of the selected battery modules and a control processor of the inverter to either source/sink power respectively to/from the DC bus, accessing updated DC bus voltage and updated REPM output voltage, and if the DC bus voltage and the REPM output voltage are about equal, then periodically accessing sensor data and component data, else reselecting and reinstructing the battery modules in combination with the inverter. A system for implementing the method and a non-transitory computer-readable medium are also disclosed.Type: GrantFiled: May 25, 2018Date of Patent: April 13, 2021Assignee: General Electric CompanyInventors: Joshua Webb, Kenneth Rush, Luca Tonini
-
Publication number: 20200176988Abstract: Controlling an energy storage system includes accessing monitored sensor data and component data, if the DC bus voltage is less than the renewable energy power module (REPM) output voltage then selecting battery modules in combination with a power-network inverter to source power to the bus, else if greater than the REPM voltage then selecting battery modules in combination with the inverter to sink power from the bus, instructing respective control processors of the selected battery modules and a control processor of the inverter to either source/sink power respectively to/from the DC bus, accessing updated DC bus voltage and updated REPM output voltage, and if the DC bus voltage and the REPM output voltage are about equal, then periodically accessing sensor data and component data, else reselecting and reinstructing the battery modules in combination with the inverter. A system for implementing the method and a non-transitory computer-readable medium are also disclosed.Type: ApplicationFiled: May 25, 2018Publication date: June 4, 2020Inventors: Joshua WEBB, Kenneth RUSH, Luca Tonini
-
Patent number: 10199841Abstract: The present disclosure is directed to a system and method for controlling an energy storage system. The energy storage system includes a plurality of battery strings connected in parallel with the battery strings having a plurality of batteries connected in series. The method includes determining, via a controller, one or more operating parameters of the energy storage system. The method also includes determining, via the controller, a maximum current rating of one or more of the battery strings. Another step includes estimating, via the controller, a voltage range for the one or more battery strings as a function of the one or more operating parameters and the maximum current rating. The method also includes dynamically controlling the one or more battery strings based on the voltage range so as to prevent over-current recharge or discharge of the parallel battery strings.Type: GrantFiled: December 21, 2015Date of Patent: February 5, 2019Assignee: General Electric CompanyInventors: Joshua Paul Webb, David E. James, Kenneth Rush McClellan, Jr., Mark Gotobed
-
Patent number: 9794057Abstract: A system for synthetically sampling an input signal to provide a sampled signal includes a sample clock and a mixer. The sample clock is configured to generate a sampling signal having a sampling frequency. The mixer is configured to receive the sampling signal and the input signal, and to output an intermediate frequency (IF) signal by mixing the sampling signal and the input signal. An offset voltage is introduced into the mixer with the sampling signal to provide a baseband image, the offset voltage being adjusted so that the baseband image of the IF signal has the same magnitude as a first harmonic image of the IF signal.Type: GrantFiled: April 29, 2011Date of Patent: October 17, 2017Assignee: Keysight Technologies, Inc.Inventor: Kenneth Rush
-
Publication number: 20170179739Abstract: The present disclosure is directed to a system and method for controlling an energy storage system. The energy storage system includes a plurality of battery strings connected in parallel with the battery strings having a plurality of batteries connected in series. The method includes determining, via a controller, one or more operating parameters of the energy storage system. The method also includes determining, via the controller, a maximum current rating of one or more of the battery strings. Another step includes estimating, via the controller, a voltage range for the one or more battery strings as a function of the one or more operating parameters and the maximum current rating. The method also includes dynamically controlling the one or more battery strings based on the voltage range so as to prevent over-current recharge or discharge of the parallel battery strings.Type: ApplicationFiled: December 21, 2015Publication date: June 22, 2017Inventors: Joshua Paul Webb, David E. James, Kenneth Rush McClellan, JR., Mark Gotobed
-
Patent number: 8849602Abstract: A method of calibrating a reconstructed signal from a plurality of sub-signals is provided. The method includes injecting a calibration signal having multiple tones into a received input signal; dividing the input signal into a first and second sub-signal, including an overlapping frequency band; performing a first frequency translation by converting frequency components of the second sub-signal; digitizing the first sub-signal and the frequency converted second sub-signal; performing a second frequency translation to reverse the first frequency translation to obtain a reconstructed second sub-signal; and quantifying impairments to the digital first sub-signal and reconstructed second sub-signal caused by differences in magnitude and phase of frequency components within the overlapping frequency band.Type: GrantFiled: October 27, 2011Date of Patent: September 30, 2014Assignee: Agilent Technologies, Inc.Inventors: Ken A. Nishimura, Kenneth Rush
-
Publication number: 20130110442Abstract: A method of calibrating a reconstructed signal from a plurality of sub-signals is provided. The method includes injecting a calibration signal having multiple tones into a received input signal; dividing the input signal into a first and second sub-signal, including an overlapping frequency band; performing a first frequency translation by converting frequency components of the second sub-signal; digitizing the first sub-signal and the frequency converted second sub-signal; performing a second frequency translation to reverse the first frequency translation to obtain a reconstructed second sub-signal; and quantifying impairments to the digital first sub-signal and reconstructed second sub-signal caused by differences in magnitude and phase of frequency components within the overlapping frequency band.Type: ApplicationFiled: October 27, 2011Publication date: May 2, 2013Applicant: AGILENT TECHNOLOGIES, INC.Inventors: Ken A. NISHIMURA, Kenneth RUSH
-
Publication number: 20070259219Abstract: A technique that is usable with a fuel cell stack includes detecting an unhealthy condition of the stack, such as carbon monoxide poisoning, flooding, or fuel starvation, and implementing a recovery action to correct the detected condition. The technique further includes observing the response of the stack to the recovery action to distinguish between unhealthy conditions that have the same indications. In the event that multiple unhealthy conditions are present concurrently, the technique also includes determining an appropriate sequence of recovery actions to correct each of the unhealthy conditions.Type: ApplicationFiled: December 22, 2006Publication date: November 8, 2007Inventors: Jing Ou, Zhi Zhou, Vishnu Poonamallee, Lam Wong, Kenneth Rush, Dustan Skidmore, John Parks
-
Publication number: 20070154742Abstract: A technique to shut down a fuel cell stack includes reducing an oxidant flow through the fuel cell stack, and decreasing the current of the fuel cell stack while maintaining an approximately constant rate of fuel flow to the fuel cell stack. Once the power output of the fuel cell stack reaches zero due to the depletion of oxygen at the cathode, the fuel flow to the fuel cell stack anode is then halted. Then, the stack is either isolated from the reactant streams, or the cathode is briefly purged by the fuel before the stack is isolated from the reactant streams, or both the anode and the cathode are purged in sequence by air before the stack is isolated from the reactant streams.Type: ApplicationFiled: December 29, 2005Publication date: July 5, 2007Inventors: Hao Tang, Zhigang Qi, Manikandan Ramani, Kenneth Rush, Lam Wong, Noel Miklas
-
Patent number: 6856126Abstract: A voltage probe includes a first signal lead configured to receive a first signal from a device under test, a first probe-tip network that is coupled to the first signal lead and that has a frequency response that includes a first transmission zero, a first compensation network that is coupled to the first probe-tip network and that has a frequency response that includes a first transmission pole, a second signal lead configured to receive a second signal from the device under test, a second probe-tip network that is coupled to the second signal lead and that has a frequency response that includes a second transmission zero, a second compensation network that is coupled to the second probe-tip network and that has a frequency response that includes a second transmission pole, and a differential amplifier circuit that is coupled to the first compensation network and to the second compensation network, and that is configured to provide a third signal that is responsive to the first signal and to the second signType: GrantFiled: January 21, 2003Date of Patent: February 15, 2005Assignee: Agilent Technologies, Inc.Inventors: Michael T. McTigue, Kenneth Rush, Bob Kimura, Michael J. Lujan
-
Publication number: 20040140819Abstract: A voltage probe includes a first signal lead configured to receive a first signal from a device under test, a first probe-tip network that is coupled to the first signal lead and that has a frequency response that includes a first transmission zero, a first compensation network that is coupled to the first probe-tip network and that has a frequency response that includes a first transmission pole, a second signal lead configured to receive a second signal from the device under test, a second probe-tip network that is coupled to the second signal lead and that has a frequency response that includes a second transmission zero, a second compensation network that is coupled to the second probe-tip network and that has a frequency response that includes a second transmission pole, and a differential amplifier circuit that is coupled to the first compensation network and to the second compensation network, and that is configured to provide a third signal that is responsive to the first signal and to the second signType: ApplicationFiled: January 21, 2003Publication date: July 22, 2004Inventors: Michael T. McTigue, Kenneth Rush, Bob Kimura, Michael J. Lujan
-
Patent number: 6483284Abstract: A probe apparatus for use with analyzing devices, primarily oscilloscopes and logic analyzers, which uses pole-zero cancellation to provide a probe with low capacitance and wide bandwidth. Pole-zero cancellation enables the probe to have constant gain at all frequencies. In one embodiment, the coaxial cable between the probe tip and the replication amplifier is terminated in its characteristic impedance to provide constant gain at all frequencies regardless of cable length. Use of pole-zero cancellation and thick film technology enables building a probe with a small, durable tip.Type: GrantFiled: June 20, 2001Date of Patent: November 19, 2002Assignee: Agilent Technologies, Inc.Inventors: David D. Eskeldson, Steven D Draving, Kenneth Rush
-
Patent number: 5815100Abstract: An electrical interconnect between a plurality of output nodes of a first integrated circuit (IC) and a plurality of input nodes of a second IC, the interconnect. A first bond pad located on the first integrated circuit is coupled to the output nodes. A second bond pad located on the second integrated circuit is coupled to the input nodes. A first digital-to-analog converter located on the first integrated circuit and having an output coupled to the first bond pad receives a plurality of binary inputs from the output nodes of the first integrated circuit. A first analog-to-digital converter is located on the second integrated circuit and coupled to the second bond pad and has an output line coupled to each of the plurality of input nodes of the second IC.Type: GrantFiled: June 4, 1996Date of Patent: September 29, 1998Assignee: Hewlett-Packard CompanyInventors: Kenneth Rush, Eldon Cornish, Steve Draving
-
Patent number: 5742181Abstract: A programmable logic device including a plurality of programmable atomic logic elements (PALEs) where each PALE has a plurality of data inputs and generates a data output signal. The PALEs are logically arranged as a plurality of hierarchically coupled partitions. Each partition is defined by a unique set of the next lower hierarchy partitions and an interconnect bus that extends only to the unique set of the next lower partitions that are within that partition. The lowest level of hierarchy is one of the plurality of PALEs. A plurality of hyperlinks provided within each PALE programmably couples the PALE data output signal to each of the interconnect busses in each of the higher levels of hierarchy that include the PALE. Preferably, the PALE also includes a tunnel connection for coupling the PALE data output signal to adjacent neighbor PALEs without using the interconnect bus of any of the partitions.Type: GrantFiled: June 4, 1996Date of Patent: April 21, 1998Assignee: Hewlett-Packard Co.Inventor: Kenneth Rush
-
Patent number: 5723906Abstract: A multi-chip module including a multi-layer substrate and a patterned metallization layer formed on each layer of the substrate. A multi-tiered cavity is formed with an integrated circuit (IC) mounting surface at the bottom of the multi-tiered cavity. A plurality of ICs are mounted on the IC mounting surface of the cavity. A first set of wire bonds extends from at least one IC to the exposed portions of patterned metallization of at least two tiers of the multi-tiered cavity. A second set of wire bonds extends from the at least one IC to bond pads of an adjacent IC. A third set of wire bonds extends from the at least one IC to bond pads of the adjacent IC such that the third set of wire bonds has a higher loop height than the second set of wire bonds.Type: GrantFiled: June 7, 1996Date of Patent: March 3, 1998Assignee: Hewlett-Packard CompanyInventor: Kenneth Rush
-
Patent number: 5629617Abstract: An analog electronic test probe includes hundreds of inputs each connected to two amplifiers, each in a separate multiplexer stage on an integrated circuit. A programmer, responsive to a dial, shifts data through a shift register of latches each of which is connected to one of the amplifiers, activating the amplifier(s) connected to the selected input, thereby multiplexing it (them) to selected output(s). Similarly, the gain for each output may be selected. An outdisable circuit connected to the outputs of each multiplexer and the outputs of each IC chip causes each output to appear electrically as an open circuit when no input associated with the multiplexer or chip is selected. This permits any number of multiplexers and IC chips to be daisy-chained together.Type: GrantFiled: January 6, 1995Date of Patent: May 13, 1997Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, David J. Dascher, Kenneth Rush, Keith C. Griggs
-
Patent number: 5134403Abstract: Disclosed is an analog to digital conversion system that converts high speed analog signals to digital values without using a hold circuit. The system has a narrow aperture sampling circuit that samples an input signal and feeds the sampled signal to a capacitor. A resistor in parallel with the capacitor discharges the capacitor at a predetermined rate, thus the capacitor does not hold the sampled signal. The discharging signal output of the capacitor-resistor circuit is amplified and then filtered using a low-pass filter, which has essentially linear phase shift and no undershoot. The filtered signal is then amplified and fed to a flash analog to digital converter which converts the signal into a digital value. The low-pass filter creates a Gaussian output and the converter is timed to convert the signal at the peak of the filter output.Type: GrantFiled: December 6, 1990Date of Patent: July 28, 1992Assignee: Hewlett-Packard Co.Inventor: Kenneth Rush
-
Patent number: 4743839Abstract: A probe apparatus for use with analyzing devices, primarily oscilloscopes, which uses pole-zero cancellation to provide a probe with low capacitance and wide bandwidth. Pole-zero cancellation enables the probe to have constant gain at all frequencies. In one embodiment, the coaxial cable between the probe tip and the replication amplifier is terminated in its characteristic impedance to provide constant gain at all frequencies regardless of cable length. Use of pole-zero cancellation and thick film technology enables building a probe with a small, durable tip.Type: GrantFiled: December 19, 1986Date of Patent: May 10, 1988Assignee: Hewlett Packard CompanyInventor: Kenneth Rush