Abstract: This invention minimizes the thermal resistance and maximizes the power density of a power transistor by mounting the transistor in flip-chip fashion on a heat sink/heat spreader and conducting the heat from the active semiconductor layer through the heat sink/heat spreader (as opposed to through the low conductivity substrate). Illustratively, the semiconductor device package comprises: a high electron mobility transistor (HEMT) formed in a layer of Gallium Nitride (GaN) having a first major surface; at least one metal contact pad making thermal contact with the layer of GaN on its first major surface; a heat sink/heat spreader in electrical and thermal contact with the contact pad(s) on the first surface; and a substrate on which the heat sink is mounted.

Abstract: A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier.

Abstract: A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier.

Abstract: A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier.

Abstract: A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier.

Abstract: The present invention implements a series of analog gain and phase correction circuits in each leg of the N-way Doherty to significantly reduce amplitude modulation to amplitude modulation (AM-AM) and amplitude modulation to phase modulation (AM-PM), distortion. The correction blocks comprise gain and phase corrections and optionally an additional gain block. The phase corrections include at least a phase offset and may include an optional non-linear element such as a diode pre-distorter. The pre-distortion circuitry is intended to reduce the necessary complexity of the DPD and reduce the DPD cost and power consumption. The gain and phase corrections can be calculated from computational optimization to minimize the AM-AM and AM-PM distortion. The gain and phase corrections can also be calculated from the AM-AM and AM-PM data which can be output from common DPD systems and laboratory characterization equipment.

Abstract: A self ESD protected RF transistor. The RF transistor is connected to a sub-circuit which causes the RF transistor to self-protect from ESD damage. The sub-circuit triggers the RF transistor to clamp a positive polarity ESD pulse to ground/emitter terminal. The sub-circuit also shunts a negative polarity ESD pulse to ground.

Abstract: A combiner coupled to output terminals of a Doherty amplifier, the combiner comprising an inverter circuit and a transformer circuit. The inverter circuit comprising at least a first network and a second network, wherein each of the first network and the second network includes lumped elements. The transformer circuit comprising at least a third network and a fourth network, wherein each of the first third and the fourth network includes the lumped elements, wherein the lumped elements are selected from the group of capacitors and inductors.

Abstract: An output matching circuit for electronic amplifiers in the form of an integrated circuit is disclosed. The integrated circuit includes a first circuit, a second circuit, and a power sampling coupler. The first circuit is coupled to output of a first amplifier. The first circuit comprises a first matching section and an impedance inverter. The second circuit is coupled to output of a second amplifier, wherein the second circuit comprises a second matching section. The power sampling coupler is coupled to the first circuit and the second circuit, wherein the first circuit, the second circuit, and the power sampling coupler are fabricated as a single integrated circuit.

Abstract: A protection circuit for an electronic circuit. The protection circuit comprises at least three diodes connected in series in such a manner that an anode terminal of a first diode is connected to a cathode terminal of a second diode to form a ring. A first terminal is connected between diodes of a first pair of consecutive diodes of the ring. A second terminal is connected between diodes of a second pair of consecutive diodes of the ring. The position of the first terminal is fixed and the position of the second terminal is selectable in such a manner that a pre-determined turn-on voltage of the at least three diodes is obtained. The diodes are formed under one or more bond pads of the electronic circuit.

Abstract: A protection circuit for electronic circuitry comprising at least three diodes connected in series in such a manner that an anode terminal of a first diode is connected to a cathode terminal of a second diode to form a ring. A first terminal is connected between diodes of a first pair of consecutive diodes of the ring. A second terminal is connected between diodes of a second pair of consecutive diodes of the ring. The position of the first terminal is fixed and position of the second terminal is selectable in such a manner that a pre-determined turn-on voltage of the at least three diodes is obtained.

Abstract: A compact ESD protection device is described that uses the reverse breakdown voltage of a base-emitter junction as a trigger diode to switch a transistor that shunts the forward bias ESD current to ground. The trigger diode in series with a leakage diode provides a path to shunt the reverse bias ESD current to ground. The leakage diode is matched to the trigger diode to shunt any leakage current from the trigger diode to ground.

Abstract: A power amplifier for use in wireless communication devices is disclosed that reduces the noise generated at the output of the amplifier in the receive band of the wireless communication device. A resonant circuit is inserted between the base ballast resister and the lumped resister. The resonant frequency of the resonant circuit is adjusted to correspond to the frequency offset between the transmission frequency and the frequency corresponding to the peak noise in the receive band of the communication device.

Abstract: A power amplifier for use in wireless communication devices is disclosed that reduces the noise generated at the output of the amplifier in the receive band of the wireless communication device. A resonant circuit is inserted between the base ballast resister and the lumped resister. The resonant frequency of the resonant circuit is adjusted to correspond to the frequency offset between the transmission frequency and the frequency corresponding to the peak noise in the receive band of the communication device.

Abstract: A compact ESD protection device is described that uses the reverse breakdown voltage of a base-emitter junction as a trigger diode to switch a transistor that shunts the forward bias ESD current to ground. The trigger diode in series with a leakage diode provides a path to shunt the reverse bias ESD current to ground. The leakage diode is matched to the trigger diode to shunt any leakage current from the trigger diode to ground.