Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.

Abstract: An apparatus, comprising: a substrate; a coupling capacitor that is formed over the substrate; and an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.

Abstract: An apparatus, comprising: a substrate; a coupling capacitor that is formed over the substrate; and an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.

Abstract: A sensor integrated circuit includes a disturb immune memory configured to store data and a digital processor coupled to the disturb immune memory and including a main register. The digital processor is configured to perform one of a fast reset or slow reset of the main register according to a level of a supply voltage to the integrated circuit. The fast reset includes resetting the main register according to the data stored in the disturb immune memory and the slow reset includes resetting the main register according to a default state.

Abstract: A sensor integrated circuit includes a disturb immune memory configured to store data and a digital processor coupled to the disturb immune memory and including a main register. The digital processor is configured to perform one of a fast reset or slow reset of the main register according to a level of a supply voltage to the integrated circuit. The fast reset includes resetting the main register according to the data stored in the disturb immune memory and the slow reset includes resetting the main register according to a default state.

Abstract: A high voltage driver includes a high-side output transistor circuit, a differential to single-ended (D2SE) converter connected to a gate of the high-side output transistor circuit, wherein the D2SE is supplied by a first and a second supply voltage, and a high voltage translator connected to the D2SE converter. The D2SE converter and the translator circuit are used to clamp a voltage at the gate of the high-side transistor circuit to be the first supply voltage less the second supply voltage.

Abstract: A high voltage driver includes a high-side output transistor circuit, a differential to single-ended (D2SE) converter connected to a gate of the high-side output transistor circuit, wherein the D2SE is supplied by a first and a second supply voltage, and a high voltage translator connected to the D2SE converter. The D2SE converter and the translator circuit are used to clamp a voltage at the gate of the high-side transistor circuit to be the first supply voltage less the second supply voltage.

Abstract: An optical transmission system comprises an electrical source and an electrical-to-optical converter. The electrical source is adapted to provide an electrical signal at an output thereof. The electrical-to-optical converter has an input coupled to the output of the electrical source and is operative to convert the electrical signal to a corresponding output optical signal. The electrical source comprises a pre-emphasis circuit or other electrical signal equalization circuitry configurable to control a waveform of the electrical signal so as to produce a desired level of jitter in the output optical signal.

Abstract: Embodiments of the invention include an apparatus and method for continuously calibrating the frequency of a clock and data recovery (CDR) circuit. The apparatus includes a delay arrangement that generates a gating signal, and a gated voltage-controlled oscillator that is enabled by the gating signal. The gated voltage-controlled oscillator generates a recovered clock signal that is based on the data signal input to the CDR circuit. The apparatus also includes a frequency control loop that continuously calibrates the gated voltage-controlled oscillator in such a way that the frequency of the clock signal generated by the gated voltage-controlled oscillator continues to be one half of the period of the data bits in the input data signal and the clock signal remains synchronized to the center of the data state transitions of the input data signal. Alternatively, a secondary frequency control loop adjusts the amount of delay in the frequency control loop.

Abstract: A direct calibration technique significantly tightens a tolerance band between multiple voltage controlled oscillators (VCOs), to correct for slight frequency mismatch between the multiple VCOs. The tightened tolerance band enhances the bit error rate (BER) and/or lengthens the possible consecutive identical digits (CIDs) length, and is particularly useful in integrated circuit applications. A Frequency Locked Loop (FLL), an accumulator, and a DAC are implemented to form a calibration loop that becomes far more digital in nature than a PLL, permitting greater embedded circuit test coverage and ease of integration in VLSI digital technologies. A frequency calibrated loop with digital accumulator and DAC in lieu of a PLL with associated charge pump integrator eliminates the need for large integrated capacitors, sensitivity to drift due to the leakage currents associated with deep sub-micron technologies, and embedded analog voltages which generally cannot be tested.

Abstract: A glass fixative composition for bonding glass materials to non-glass materials is provided. The fixative composition is selected for its thermal expansion coefficient, its viscosity, its adhesion to glass, melting point, and bond strength. The glass fixative is in particular useful for bonding optical fibers to metallic materials such as Kovar. The low melting point of the glass fixative enables localized heating methods to be used, in particular, as Kovar is a ferromagnetic material, induction heating can be used to form a bond. The bond formed provides a compressive joint which enables the fiber to be hermetically fixed in position.

Abstract: A glass composition for a seal consists essentially of 70-75 wt % of PbO, 3-7 wt % of PbF2, 5-8 wt % of Bi2O3, 5-7 wt % of B203, 2-5 wt % of ZnO, 1-3 wt % of Fe2O3, 0-2 wt % of CuO, 0-2% of TeO2, and a trace <0.2% of MnO2, the composition having a flow temperature of <350° C. Such seals can be flowed at low temperatures, using different and less environmentally damaging constituents to those used before. Damage to temperature sensitive materials near the seals, can be reduced. Low flow temperatures can be achieved without excessive degradation of properties such as low viscosity, low expansion coefficient, good adhesion to glass and metals, low permeability of air, good long term hydrolytic stability. A filler such as a ceramic powder, is added to match the temperature expansion coefficient to the materials being sealed. It can be used to fix silica fiber into electro-optic devices to achieve hermetic joints with high mechanical stability.

Abstract: A glass composition for a seal consists essentially of 70-75 wt % of PbO, 3-7 wt % of PbF2, 5-8 wt % of Bi2O3, 5-7 wt % of B203, 2-5 wt % of ZnO, 1-3 wt % of Fe2O3, 0-2 wt % of CuO, 0-2% of TeO2, and a trace <0.2% of MnO2, the composition having a flow temperature of <350° C. Such seals can be flowed at low temperatures, using different and less environmentally damaging constituents to those used before. Damage to temperature sensitive materials near the seals, can be reduced. Low flow temperatures can be achieved without excessive degradation of properties such as low viscosity, low expansion coefficient, good adhesion to glass and metals, low permeability of air, good long term hydrolytic stability. A filler such as a ceramic powder, is added to match the temperature expansion coefficient to the materials being sealed. It can be used to fix silica fiber into electro-optic devices to achieve hermetic joints with high mechanical stability.

Abstract: A method of forming a substantially regular array of microscopic structures on a surface of a sample (4) is described. The sample comprises a microscopic layer of at least one first material on a substrate of a second material, wherein the microscopic layer is sufficiently thin that stress fields at the interface of the microscopic layer and the substrate cause formation of separated regions of the first material on the substrate. The microscopic layer on the sample (4) is irradiated by means of a particle beam (5) at an acute angle &agr;, to influence the direction of alignment of said separated regions and/or the relative position of adjacent said separated regions.

Abstract: A coding scheme to identify the connections an optical fiber is to form in an optical assembly is provided. The coding scheme consists of a series of colors, typically four, provided along the fiber length. The combination of colors identifies the connection the fiber is to form. Colors are transferred to the optical fiber by sublimation of the dye at a relatively low temperature. The sublimed dye then diffuses into the outer coating of the optical fiber.

Abstract: A method of forming a substantially regular array of microscopic structures on a surface of a sample (4) is described. The sample comprises a microscopic layer of at least one first material on a substrate of a second material, wherein the microscopic layer is sufficiently thin that stress fields at the interface of the microscopic layer and the substrate cause formation of separated regions of the first material on the substrate. The microscopic layer on the sample (4) is irradiated by means of a particle beam (5) at an acute angle &agr;, to influence the direction of alignment of said separated regions and/or the relative position of adjacent said separated regions.