Abstract: A method of in-line characterization of ion implant process, during the SOI bond and cleave manufacturing or engineered silicon layer fabrication. In one embodiment, the method includes the steps of illuminating the engineered donor wafer using a modulated light source; performing a non-contact SPV measurement on the silicon wafer; measuring a dynamic charge (Qd) in response to implant induced crystal damage; and determining the accuracy and uniformity of the value of an implant parameter in response to the dynamic charge. In another embodiment, In another embodiment, the step of determining utilizes the equation VPV?kT?/?Qnet where VPV is photo voltage generated in the implanted wafer, ? is a light flux of the modulated light source, T is temperature of the wafer, and ? is a light modulation frequency of the modulated light source.

Abstract: The invention relates to the use of the metrology methods and the related apparatus disclosed herein that incorporate thermal treatment devices and methods that improve defect detection. Specifically, in one aspect the invention relates to method of thermally treating a semiconductor wafer such that an acceleration of interstitial defect migration is achieved while leaving vacancy defects substantially unaltered.

Abstract: A method and apparatus for thickness measurement of an active layer of a silicon-on-insulator material comprising a layered structure of silicon film, a buried oxide layer and a silicon substrate. In one embodiment, the method comprises the steps of directing a low intensity light of an energy greater than the silicon band-gap on the silicon film, the energy of light sufficient to be substantially absorbed within the silicon film such that the error from the substrate excitation is small compared to the small signal calibration of the apparatus; modifying the surface potential with the chemical treatment, electrical bias or corona, measuring surface photovoltage of the silicon film; and calculating the thickness of the silicon film in response to a non-contact photovoltage measurement of the semiconductor layered structure.

Abstract: A probe adapted for characterization of a semiconductor wafer having a surface. In one embodiment, the probe includes a source of modulated light; an optical fiber in optical communication with the source of modulated light, the optical fiber having a face and comprises a fiber core; and a transparent conductive layer coating the face of the optical fiber. Light from the source of modulated light is directed along the fiber core of the optical fiber through the face of the optical fiber to the surface of the semiconductor wafer. The optically transparent conductive layer detects charges from the surface of the semiconductor wafer.

Abstract: A method and apparatus for forming an oxide layer on semiconductors using a combination of ultraviolet rays and heat. The apparatus comprises a chamber having a top surface and a bottom surface and defining a wafer holding cavity; an ultraviolet source at the top surface of said chamber; an infrared source at the bottom surface of the chamber; and an oxygen gas inlet for passing oxygen gas through the chamber. Oxygen gas entering the chamber through the oxygen gas inlet is ionized by ultraviolet rays from the ultraviolet source and reacts with the silicon wafer to create an oxide layer on the silicon wafer in the cavity. Infrared radiation from the infrared source heats the silicon wafer to accelerate the creation of the oxide layer on said silicon wafer.

Abstract: The invention relates to a method for real-time in-situ implantation and measurement incorporating a feedback loop to adjust the implantation dose of a substrate during the manufacturing and testing of semiconductor wafers. During processing, the substrate, such as a silicon wafer, is transported between a measuring device and an implantation device multiple times to ensure that where the beam from the implantation device hits the substrate, the doping concentration falls within the range of desired parameters.

Abstract: The invention relates to the use of the metrology methods and the related apparatus disclosed herein that incorporate thermal treatment devices and methods that improve defect detection. Specifically, in one aspect the invention relates to method of thermally treating a semiconductor wafer such that an acceleration of interstitial defect migration is achieved while leaving vacancy defects substantially unaltered.

Abstract: A method and apparatus for measuring damage of an ion implanted semiconductor wafer during semiconductor processing. The method includes the steps of conveying the wafer such that a surface of the wafer is substantially parallel to a surface photovoltage electrode of a head assembly during the semiconductor processing and exposing at least a portion of the wafer to light having a wavelength, and an intensity and modulating the light intensity at a predefined frequency. The method also includes the step of varying the frequency of the light intensity modulation and detecting the surface photovoltage in response to light modulated at the various frequencies using the surface photovoltage electrode. The method then calculates an electrical property of the wafer from the photovoltage induced at the surface of the wafer at each of the light intensity modulation frequencies.

Abstract: A method and apparatus for measuring damage of an ion implanted semiconductor wafer during semiconductor processing. The method includes the steps of conveying the wafer such that a surface of the wafer is substantially parallel to a surface photovoltage electrode of a head assembly during the semiconductor processing and exposing at least a portion of said wafer to light having a wavelength, and an intensity and modulating the light intensity at a predefined frequency. The method also includes the step of varying the frequency of the light intensity modulation and detecting the surface photovoltage in response to light modulated at the various frequencies using the surface photovoltage electrode. The method then calculates an electrical property of the wafer from the photovoltage induced at the surface of the wafer at each of the light intensity modulation frequencies.

Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.

Abstract: The invention relates to a method and apparatus for real-time in-situ implantation and measurement incorporating a feedback loop to adjust the implantation dose of a substrate during the manufacturing and testing of semiconductor wafers. During processing, the substrate, such as a silicon wafer, is transported between a measuring device and an implantation device multiple times to ensure that where the beam from the implantation device hits the substrate, the doping concentration falls within the range of desired parameters.

Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.

Abstract: A process for producing regions of high resistivity in gallium arsenide, and other related compounds and mixed crystals which show electrical behavior which is similar to that of gallium arsenide, in which deuterons are implanted into a substrate made of the semi-conductor body with energies up to a maximum value corresponding to a desired depth of penetration into the body. Apparatus for carrying out the process also is described.

Abstract: A process for manufacturing gallium arsenide devices in which regions of high resistivity are created in the gallium arsenide by subjecting the regions to bombardment by protons and then by deuterons, and devices so made.